| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 416 Value *V0 = Ext0->getVectorOperand(), *V1 = Ext1->getVectorOperand(); in foldExtExtCmp() local
434 Value *V0 = Ext0->getVectorOperand(), *V1 = Ext1->getVectorOperand(); in foldExtExtBinop() local
460 Value *V0, *V1; in foldExtractExtract() local
585 Value *V0 = nullptr, *V1 = nullptr; in scalarizeBinopOrCmp() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsMachineFunction.cpp | 76 Register V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() local
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| H A D | Mips16ISelDAGToDAG.cpp | 75 Register V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(MF); in initGlobalBaseReg() local
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| /netbsd-src/lib/libm/src/ |
| H A D | e_j1f.c | 97 static const float V0[5] = { variable
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| H A D | e_j1.c | 136 static const double V0[5] = { variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 222 SDValue V0 = N->getOperand(i+1); in tryInlineAsm() local
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| /netbsd-src/external/gpl2/groff/dist/src/roff/troff/ |
| H A D | number.cpp | 33 vunits V0; variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1829 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) { in createGPRPairNode()
1840 SDNode *ARMDAGToDAGISel::createSRegPairNode(EVT VT, SDValue V0, SDValue V1) { in createSRegPairNode()
1851 SDNode *ARMDAGToDAGISel::createDRegPairNode(EVT VT, SDValue V0, SDValue V1) { in createDRegPairNode()
1862 SDNode *ARMDAGToDAGISel::createQRegPairNode(EVT VT, SDValue V0, SDValue V1) { in createQRegPairNode()
1873 SDNode *ARMDAGToDAGISel::createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, in createQuadSRegsNode()
1888 SDNode *ARMDAGToDAGISel::createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, in createQuadDRegsNode()
1903 SDNode *ARMDAGToDAGISel::createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, in createQuadQRegsNode()
2276 SDValue V0 = N->getOperand(Vec0Idx + 0); in SelectVST() local
2332 SDValue V0 = N->getOperand(Vec0Idx + 0); in SelectVST() local
2452 SDValue V0 = N->getOperand(Vec0Idx + 0); in SelectVLDSTLane() local
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 391 Value *V0 = I->getOperand(0); in drillValueDownOneStep() local
469 Value *V0 = I->getOperand(0); in simplify() local
1828 Value *V0, *V1; in visitSub() local
2342 Value *A0, *A1, *V0, *V1; in visitFSub() local
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| H A D | InstCombineVectorOps.cpp | 76 Value *V0, *V1; in cheapToScalarize() local
2136 Value *V0 = Shuf.getOperand(0), *V1 = Shuf.getOperand(1); in foldShuffleWithInsert() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | LibCallsShrinkWrap.cpp | 470 Constant *V0 = ConstantFP::get(CI->getContext(), APFloat(0.0f)); in generateCondForPow() local
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/mips/ |
| H A D | macdefs.h | 140 #define V0 2 macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/PerfectShuffle/ |
| H A D | PerfectShuffle.cpp | 28 static inline unsigned short MakeMask(unsigned V0, unsigned V1, in MakeMask()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 4634 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_VECTOR_SPLICE() local
4704 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_VECTOR_REVERSE() local
4717 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_VECTOR_SHUFFLE() local
4876 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_INSERT_VECTOR_ELT() local
4894 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntOp_EXTRACT_VECTOR_ELT() local
4908 SDValue V0 = GetPromotedInteger(N->getOperand(0)); in PromoteIntOp_EXTRACT_SUBVECTOR() local
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| /netbsd-src/crypto/external/bsd/openssl/dist/crypto/aria/ |
| H A D | aria.c | 54 #define MAKE_U32(V0, V1, V2, V3) ( \ argument
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| /netbsd-src/crypto/external/bsd/openssl.old/dist/crypto/aria/ |
| H A D | aria.c | 54 #define MAKE_U32(V0, V1, V2, V3) ( \ argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 127 Value *V0 = I->getOperand(0); in XorOpnd() local
1030 Value *V0 = Sub->getOperand(0); in ShouldBreakUpSubtract() local
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| /netbsd-src/sys/arch/sparc/sparc/ |
| H A D | autoconf.c | 659 #define BP_APPEND(BP,N,V0,V1,V2) { \ in bootpath_fake() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1030 SDValue V0, V1; in insertHvxSubvectorReg() local
1242 SDValue V0 = buildHvxVectorReg(A.take_front(Size/2), dl, SingleTy, DAG); in LowerHvxBuildVector() local
1319 SDValue V0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfTy, in LowerHvxConcatVectors() local
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| H A D | HexagonISelDAGToDAG.cpp | 2164 SDValue V0 = L0.Value; in balanceSubTree() local
2222 SDValue V0 = NewRoot.getOperand(0); in balanceSubTree() local
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| H A D | HexagonLoopIdiomRecognition.cpp | 1772 uint32_t V0 = C0->getZExtValue(); in setupPostSimplifier() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 852 Value *V0 = ResList[i], *V1 = ResList[i + 1]; in concatenateVectors() local
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| /netbsd-src/external/gpl3/gcc.old/dist/contrib/ |
| H A D | paranoia.cc | 989 FLOAT V, V0, V9; member
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| /netbsd-src/external/gpl3/gcc/dist/contrib/ |
| H A D | paranoia.cc | 989 FLOAT V, V0, V9; member
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1820 SDValue V0 = DAG.getNode(ISD::TRUNCATE, DL, VT, WideVal.getOperand(0)); in EmitTest() local
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