| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 108 Register TargetReg = Cond[1].getReg(); optimizeBlock() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 186 unsigned TargetReg = Inst.getOperand(1).getReg(); in emitInstruction() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 991 unsigned TargetReg; in tracePredStateThroughIndirectBranches() local
1109 Register TargetReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
1142 Register TargetReg = TargetAddrSSA.GetValueInMiddleOfBlock(&MBB); in tracePredStateThroughIndirectBranches() local
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| H A D | X86ExpandPseudo.cpp | 229 auto TargetReg = STI->getTargetTriple().isOSWindows() ? X86::RCX : X86::RDI; in expandCALL_RVMARKER() local
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| H A D | X86ISelLowering.cpp | 57674 Register TargetReg; EmitKCFICheck() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 866 Register TargetReg = I->getOperand(1).getReg(); in expandEhReturn() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 743 Register TargetReg = RealignmentPadding allocateStackSpace() local
833 Register TargetReg = findScratchNonCalleeSaveRegister(&MBB); allocateStackSpace() local
4453 Register TargetReg = MI->getOperand(0).getReg(); inlineStackProbe() local
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| H A D | AArch64InstrInfo.cpp | 9512 probedStackAlloc(MachineBasicBlock::iterator MBBI,Register TargetReg,bool FrameSetup) const probedStackAlloc() argument
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| H A D | AArch64ISelLowering.cpp | 2748 Register TargetReg = MI.getOperand(0).getReg(); EmitDynamicProbedAlloc() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZAsmPrinter.cpp | 330 Register TargetReg = MI->getOperand(0).getReg(); emitInstruction() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3046 Register TargetReg = MI.getOperand(0).getReg(); expandVSXMemPseudo() local
3133 Register TargetReg = MI.getOperand(0).getReg(); expandPostRAPseudo() local
3155 Register TargetReg = MI.getOperand(0).getReg(); expandPostRAPseudo() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 179 Register TargetReg) { in buildGitPtr() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3644 Register TargetReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass); selectBrJT() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 3209 buildBitFieldInsert(MachineIRBuilder & B,Register TargetReg,Register InsertReg,Register OffsetBits) buildBitFieldInsert() argument
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