/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVBaseInfo.h | 102 static inline unsigned getFormat(uint64_t TSFlags) { in getFormat() 106 static inline VConstraintType getConstraint(uint64_t TSFlags) { in getConstraint() 111 static inline VLMUL getLMul(uint64_t TSFlags) { in getLMul() 115 static inline bool hasDummyMaskOp(uint64_t TSFlags) { in hasDummyMaskOp() 119 static inline bool doesForceTailAgnostic(uint64_t TSFlags) { in doesForceTailAgnostic() 123 static inline bool hasMergeOp(uint64_t TSFlags) { in hasMergeOp() 127 static inline bool hasSEWOp(uint64_t TSFlags) { in hasSEWOp() 131 static inline bool hasVLOp(uint64_t TSFlags) { in hasVLOp()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 120 static bool isDispOrCDisp8(uint64_t TSFlags, int Value, int &ImmOffset) { in isDispOrCDisp8() 143 static MCFixupKind getImmFixupKind(uint64_t TSFlags) { in getImmFixupKind() 380 uint64_t TSFlags, bool HasREX, in emitMemModRMByte() 657 uint64_t TSFlags = MCII.get(MI.getOpcode()).TSFlags; in emitPrefixImpl() local 760 uint64_t TSFlags = Desc.TSFlags; in emitVEXOpcodePrefix() local 1211 uint64_t TSFlags = Desc.TSFlags; in emitREXPrefix() local 1338 uint64_t TSFlags = Desc.TSFlags; in emitOpcodePrefix() local 1398 uint64_t TSFlags = Desc.TSFlags; in emitPrefix() local 1414 uint64_t TSFlags = Desc.TSFlags; in encodeInstruction() local
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H A D | X86BaseInfo.h | 965 inline bool isPrefix(uint64_t TSFlags) { in isPrefix() 970 inline bool isPseudo(uint64_t TSFlags) { in isPseudo() 976 inline uint8_t getBaseOpcodeFor(uint64_t TSFlags) { in getBaseOpcodeFor() 980 inline bool hasImm(uint64_t TSFlags) { in hasImm() 986 inline unsigned getSizeOfImm(uint64_t TSFlags) { in getSizeOfImm() 1003 inline bool isImmPCRel(uint64_t TSFlags) { in isImmPCRel() 1022 inline bool isImmSigned(uint64_t TSFlags) { in isImmSigned() 1086 inline int getMemoryOperandNo(uint64_t TSFlags) { in getMemoryOperandNo() 1216 inline bool isKMasked(uint64_t TSFlags) { in isKMasked() 1221 inline bool isKMergeMasked(uint64_t TSFlags) { in isKMergeMasked()
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H A D | X86InstPrinterCommon.cpp | 336 uint64_t TSFlags = Desc.TSFlags; in printInstFlags() local
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H A D | X86InstComments.cpp | 263 uint64_t TSFlags = Desc.TSFlags; in printMasking() local
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H A D | X86AsmBackend.cpp | 344 uint64_t TSFlags = Desc.TSFlags; in isRIPRelative() local 383 uint64_t TSFlags = Desc.TSFlags; in determinePaddingPrefix() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVMCInstLower.cpp | 150 uint64_t TSFlags = MI->getDesc().TSFlags; in lowerRISCVVMachineInstrToMCInst() local
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H A D | RISCVISelLowering.cpp | 6549 uint64_t TSFlags = MI.getDesc().TSFlags; in EmitInstrWithCustomInserter() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstrFMA3Info.cpp | 129 const X86InstrFMA3Group *llvm::getFMA3Group(unsigned Opcode, uint64_t TSFlags) { in getFMA3Group()
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H A D | X86MCInstLower.cpp | 961 uint64_t TSFlags = MI->getDesc().TSFlags; in Lower() local
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H A D | X86InstrInfo.cpp | 1820 static unsigned getThreeSrcCommuteCase(uint64_t TSFlags, unsigned SrcOpIdx1, in getThreeSrcCommuteCase() 2363 uint64_t TSFlags = MI.getDesc().TSFlags; in findThreeSrcCommutedOpIndices() local
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H A D | X86ISelDAGToDAG.cpp | 1538 uint64_t TSFlags = getInstrInfo()->get(In.getMachineOpcode()).TSFlags; in PostprocessISelDAG() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 110 uint64_t TSFlags = MI.getDesc().TSFlags; in getBaseOffset() local
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H A D | ARMBaseInstrInfo.cpp | 184 uint64_t TSFlags = MI.getDesc().TSFlags; in convertToThreeAddress() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCHazardRecognizers.cpp | 287 uint64_t TSFlags = MCID.TSFlags; in GetInstrType() local
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 203 uint64_t TSFlags; // Target Specific Flag values variable
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 3054 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; in checkTargetMatchPredicate() local 3821 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; in validateFlatOffset() local 3872 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; in validateSMEMOffset() local 4056 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; in validateAGPRLdSt() local 4121 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; in validateCoherencyBits() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 295 uint64_t TSFlags = DAsm->getMCII()->get(Opc).TSFlags; in decodeOperand_AVLdSt_Any() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 1870 uint64_t TSFlags = Desc.TSFlags; in encodeInstruction() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 87 static PrefixInfo CreateFromInst(const MCInst &Inst, uint64_t TSFlags) { in CreateFromInst()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 5905 uint64_t TSFlags = getInstDesc(Inst.getOpcode()).TSFlags; in checkTargetMatchPredicate() local
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