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Searched defs:TSFlags (Results 1 – 25 of 33) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h146 static inline bool hasSEWOp(uint64_t TSFlags) { in getFormat() argument
150 getLMul(uint64_t TSFlags) getLMul() argument
154 doesForceTailAgnostic(uint64_t TSFlags) doesForceTailAgnostic() argument
158 isTiedPseudo(uint64_t TSFlags) isTiedPseudo() argument
162 hasSEWOp(uint64_t TSFlags) hasSEWOp() argument
166 hasVLOp(uint64_t TSFlags) hasVLOp() argument
170 hasVecPolicyOp(uint64_t TSFlags) hasVecPolicyOp() argument
174 isRVVWideningReduction(uint64_t TSFlags) isRVVWideningReduction() argument
178 usesMaskPolicy(uint64_t TSFlags) usesMaskPolicy() argument
183 hasRoundModeOp(uint64_t TSFlags) hasRoundModeOp() argument
188 usesVXRM(uint64_t TSFlags) usesVXRM() argument
191 const uint64_t TSFlags = Desc.TSFlags; getVLOpNum() local
202 const uint64_t TSFlags = Desc.TSFlags; getSEWOpNum() local
218 const uint64_t TSFlags = Desc.TSFlags; getFRMOpNum() local
233 const uint64_t TSFlags = Desc.TSFlags; getVXRMOpNum() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h882 isPrefix(uint64_t TSFlags) isPrefix() argument
887 isPseudo(uint64_t TSFlags) isPseudo() argument
893 getBaseOpcodeFor(uint64_t TSFlags) getBaseOpcodeFor() argument
897 hasImm(uint64_t TSFlags) hasImm() argument
901 getSizeOfImm(uint64_t TSFlags) getSizeOfImm() argument
923 isImmPCRel(uint64_t TSFlags) isImmPCRel() argument
943 isImmSigned(uint64_t TSFlags) isImmSigned() argument
1001 hasNewDataDest(uint64_t TSFlags) hasNewDataDest() argument
1011 getMemoryOperandNo(uint64_t TSFlags) getMemoryOperandNo() argument
1257 uint64_t TSFlags = Desc.TSFlags; canUseApxExtendedReg() local
1310 isKMasked(uint64_t TSFlags) isKMasked() argument
1315 isKMergeMasked(uint64_t TSFlags) isKMergeMasked() argument
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H A DX86MCCodeEmitter.cpp406 isDispOrCDisp8(uint64_t TSFlags,int Value,int & ImmOffset) isDispOrCDisp8() argument
430 getImmFixupKind(uint64_t TSFlags) getImmFixupKind() argument
599 emitMemModRMByte(const MCInst & MI,unsigned Op,unsigned RegOpcodeField,uint64_t TSFlags,PrefixKind Kind,uint64_t StartByte,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI,bool ForceSIB) const emitMemModRMByte() argument
881 uint64_t TSFlags = MCII.get(MI.getOpcode()).TSFlags; emitPrefixImpl() local
956 uint64_t TSFlags = Desc.TSFlags; emitVEXOpcodePrefix() local
1303 uint64_t TSFlags = Desc.TSFlags; emitREXPrefix() local
1426 uint64_t TSFlags = Desc.TSFlags; emitOpcodePrefix() local
1488 uint64_t TSFlags = Desc.TSFlags; emitPrefix() local
1505 uint64_t TSFlags = Desc.TSFlags; encodeInstruction() local
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H A DX86InstPrinterCommon.cpp360 uint64_t TSFlags = Desc.TSFlags; printInstFlags() local
H A DX86EncodingOptimization.cpp37 uint64_t TSFlags = Desc.TSFlags; in optimizeInstFromVEX3ToVEX2() local
H A DX86InstComments.cpp263 uint64_t TSFlags = Desc.TSFlags; printMasking() local
H A DX86AsmBackend.cpp259 uint64_t TSFlags = Desc.TSFlags; in isRIPRelative() local
298 uint64_t TSFlags = Desc.TSFlags; in determinePaddingPrefix() local
H A DX86MCTargetDesc.cpp117 int MemoryOperand, uint64_t TSFlags) { in needsAddressSizeOverride() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVOptWInstrs.cpp91 const uint64_t TSFlags = MCID.TSFlags; vectorPseudoHasAllNBitUsers() local
342 uint64_t TSFlags = MI.getDesc().TSFlags; isSignExtendingOpW() local
H A DRISCVInsertVSETVLI.cpp364 uint64_t TSFlags = MI.getDesc().TSFlags; getDemanded() local
821 computeInfoForInstr(const MachineInstr & MI,uint64_t TSFlags,const RISCVSubtarget & ST,const MachineRegisterInfo * MRI) computeInfoForInstr() argument
1093 uint64_t TSFlags = MI.getDesc().TSFlags; transferBefore() local
1303 uint64_t TSFlags = MI.getDesc().TSFlags; emitVSETVLIs() local
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H A DRISCVAsmPrinter.cpp897 uint64_t TSFlags = MCID.TSFlags; lowerRISCVVMachineInstrToMCInst() local
H A DRISCVInstrInfo.cpp277 uint64_t TSFlags = MBBI->getDesc().TSFlags; isConvertibleToVMV_V_V() local
2069 const uint64_t TSFlags = Desc.TSFlags; verifyInstruction() local
2578 uint64_t TSFlags = MI.getDesc().TSFlags; createMIROperandComment() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CompressEVEX.cpp208 uint64_t TSFlags = MI.getDesc().TSFlags; CompressEVEXImpl() local
H A DX86InstrFMA3Info.cpp141 const X86InstrFMA3Group *llvm::getFMA3Group(unsigned Opcode, uint64_t TSFlags) { in getFMA3Group()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp112 uint64_t TSFlags = MI.getDesc().TSFlags; in getBaseOffset() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYInstPrinter.cpp132 uint64_t TSFlags = MII.get(MI->getOpcode()).TSFlags; in printOperand() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp287 uint64_t TSFlags = MCID.TSFlags; in GetInstrType() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInsertDelayAlu.cpp63 static DelayType getDelayType(uint64_t TSFlags) { in getDelayType()
H A DSIFoldOperands.cpp206 const uint64_t TSFlags = MI->getDesc().TSFlags; in canUseImmWithOpSel() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h215 uint64_t TSFlags; // Target Specific Flag values variable
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp571 (TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in evaluateMemoryOperandAddress() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3319 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; checkTargetMatchPredicate() local
4216 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateOffset() local
4245 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateFlatOffset() local
4292 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateSMEMOffset() local
4365 uint64_t TSFlags = MII.get(Opc).TSFlags; validateOpSel() local
4396 uint64_t TSFlags = MII.get(Opc).TSFlags; validateNeg() local
4558 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateAGPRLdSt() local
4679 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateDS() local
4741 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags; validateCoherencyBits() local
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/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenRegisters.h
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp381 uint64_t TSFlags = DAsm->getMCII()->get(Opc).TSFlags; decodeOperand_AVLdSt_Any() local
1029 auto TSFlags = MCII->get(MI.getOpcode()).TSFlags; convertMIMGInst() local
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h64 const uint8_t TSFlags; variable

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