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Searched defs:TRI (Results 1 – 25 of 349) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp199 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
207 Register SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
214 Register SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
221 Register SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
229 Register SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
236 Register SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
243 Register SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
281 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateSGPRSpillToVGPR() local
347 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in reserveVGPRforSGPRSpills() local
386 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in allocateVGPRSpillToAGPR() local
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H A DSIFrameLowering.cpp62 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister() local
118 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill()
140 const SIRegisterInfo &TRI, in buildEpilogRestore()
164 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in buildGitPtr() local
190 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionFlatScratchInit() local
338 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in getEntryFunctionReservedScratchRsrcReg() local
407 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
521 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchRsrcRegSetup() local
669 static void initLiveRegs(LivePhysRegs &LiveRegs, const SIRegisterInfo &TRI, in initLiveRegs()
695 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in buildScratchExecCopy() local
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H A DSIFixSGPRCopies.cpp92 const SIRegisterInfo *TRI; member in __anonc6b6fc400111::SIFixSGPRCopies
128 const SIRegisterInfo *TRI) { in hasVectorOperands()
142 const SIRegisterInfo &TRI, in getCopyRegClasses()
163 const SIRegisterInfo &TRI) { in isVGPRToSGPRCopy()
170 const SIRegisterInfo &TRI) { in isSGPRToVGPRCopy()
176 const SIRegisterInfo *TRI, in tryChangeVGPRtoSGPRinCopy()
217 const SIRegisterInfo *TRI, in foldVGPRCopyIntoRegSequence()
395 const TargetRegisterInfo *TRI, in hoistAndMergeSGPRInits()
H A DSIShrinkInstructions.cpp223 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in shrinkMIMG() local
390 const SIRegisterInfo &TRI) { in instAccessReg()
410 const SIRegisterInfo &TRI) { in instReadsReg()
416 const SIRegisterInfo &TRI) { in instModifiesReg()
422 const SIRegisterInfo &TRI, const MachineRegisterInfo &MRI) { in getSubRegForIndex()
484 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in matchSwap() local
H A DSILowerSGPRSpills.cpp42 const SIRegisterInfo *TRI = nullptr; member in __anon4b7445d60111::SILowerSGPRSpills
87 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRSaves() local
127 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in insertCSRRestores() local
259 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in lowerShiftReservedVGPR() local
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DLiveRegUnits.h31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
73 void init(const TargetRegisterInfo &TRI) { in init()
H A DLivePhysRegs.h49 const TargetRegisterInfo *TRI = nullptr; variable
58 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
66 void init(const TargetRegisterInfo &TRI) { in init()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreMachineFunctionInfo.cpp39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
70 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
H A DMipsMachineFunction.cpp150 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEhDataRegsFI() local
168 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createISRRegFI() local
195 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getMoveF64ViaSpillFI() local
H A DMipsInstrInfo.h120 const TargetRegisterInfo *TRI) const override { in storeRegToStackSlot()
128 const TargetRegisterInfo *TRI) const override { in loadRegFromStackSlot()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp101 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
113 void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI) { in invalidateRegister()
136 void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI) { in clobberRegister()
154 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) { in trackCopy()
179 const TargetRegisterInfo &TRI, in findCopyForUnit()
190 const TargetRegisterInfo &TRI) { in findCopyDefViaUnit()
201 const TargetRegisterInfo &TRI) { in findAvailBackwardCopy()
222 const TargetRegisterInfo &TRI) { in findAvailCopy()
252 const TargetRegisterInfo *TRI; member in __anon835623930111::MachineCopyPropagation
337 MCRegister Def, const TargetRegisterInfo *TRI) { in isNopCopy()
H A DMIRPrinter.cpp194 const TargetRegisterInfo *TRI) { in printRegMIR()
253 const TargetRegisterInfo *TRI) { in printCustomRegMask()
273 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
296 const TargetRegisterInfo *TRI) { in convert()
370 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in convertStackObjects() local
497 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in convertCallSiteObjects() local
570 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
668 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in print() local
708 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
842 const TargetRegisterInfo *TRI, in print()
H A DMachineRegisterInfo.cpp383 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith() local
465 const TargetRegisterInfo &TRI, in EmitLiveInCopies()
516 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isConstantPhysReg() local
574 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified() local
588 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegUsed() local
599 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in disableCalleeSavedRegister() local
640 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isReservedRegUnit() local
H A DMachineOperand.cpp78 const TargetRegisterInfo &TRI) { in substVirtReg()
87 void MachineOperand::substPhysReg(MCRegister Reg, const TargetRegisterInfo &TRI) { in substPhysReg()
324 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in isIdenticalTo() local
403 const TargetRegisterInfo *&TRI, in tryToGetTargetInfo()
439 const TargetRegisterInfo *TRI) { in printCFIRegister()
517 const TargetRegisterInfo *TRI) { in printSubRegIdx()
612 const TargetRegisterInfo *TRI) { in printCFI()
718 void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI, in print()
724 const TargetRegisterInfo *TRI, in print()
738 const TargetRegisterInfo *TRI, in print()
H A DTargetRegisterInfo.cpp110 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
141 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
164 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
175 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
280 const TargetRegisterInfo *TRI) { in firstCommonClass()
381 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
670 const TargetRegisterInfo *TRI) { in dumpReg()
H A DInterferenceCache.cpp90 const TargetRegisterInfo *TRI) { in revalidate()
102 const TargetRegisterInfo *TRI, in reset()
120 const TargetRegisterInfo *TRI) { in valid()
H A DTargetFrameLoweringImpl.cpp67 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves() local
81 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves() local
H A DFixupStatepointCallerSaved.cpp96 static unsigned getRegisterSize(const TargetRegisterInfo &TRI, Register Reg) { in getRegisterSize()
117 const TargetRegisterInfo &TRI) { in performCopyPropagation()
210 const TargetRegisterInfo &TRI; member in __anona19089fc0211::FrameIndexesCache
234 FrameIndexesCache(MachineFrameInfo &MFI, const TargetRegisterInfo &TRI) in FrameIndexesCache()
318 const TargetRegisterInfo &TRI; member in __anona19089fc0211::StatepointState
564 const TargetRegisterInfo &TRI; member in __anona19089fc0211::StatepointProcessor
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp42 AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI) in AArch64RegisterBankInfo()
286 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrAlternativeMappings() local
487 const TargetRegisterInfo &TRI, in hasFPConstraints()
525 const TargetRegisterInfo &TRI, in onlyUsesFP()
540 const TargetRegisterInfo &TRI, in onlyDefinesFP()
574 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrMapping() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.h51 const TargetRegisterInfo *TRI) const override { in spillCalleeSavedRegisters()
59 const TargetRegisterInfo *TRI) const override { in restoreCalleeSavedRegisters()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFMIChecking.cpp34 const TargetRegisterInfo *TRI; member
106 static bool hasLiveDefs(const MachineInstr &MI, const TargetRegisterInfo *TRI) { in hasLiveDefs()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVRegisterBankInfo.cpp25 RISCVRegisterBankInfo::RISCVRegisterBankInfo(const TargetRegisterInfo &TRI) in RISCVRegisterBankInfo()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.h27 const TargetRegisterInfo *TRI; variable
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.cpp26 PPCRegisterBankInfo::PPCRegisterBankInfo(const TargetRegisterInfo &TRI) in PPCRegisterBankInfo()

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