| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 133 const TargetRegisterClass *TRC) { in usesRegClass()
270 const TargetRegisterClass *TRC = in optimizeSDPattern() local
434 const TargetRegisterClass *TRC) { in createExtractSubreg()
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| H A D | ARMLoadStoreOptimizer.cpp | 2435 const TargetRegisterClass *TRC = TII->getRegClass(MCID, 0, TRI, *MF); in RescheduleOps() local
2786 const TargetRegisterClass *TRC = TII->getRegClass(MCID, 0, TRI, *MF); in createPostIncLoadStore() local
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| H A D | ARMBaseInstrInfo.cpp | 3397 const TargetRegisterClass *TRC = MRI->getRegClass(Reg); in FoldImmediate() local
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| H A D | ARMISelLowering.cpp | 10073 const TargetRegisterClass *TRC = isThumb ? &ARM::tGPRRegClass in SetupEntryBlockForSjLj() local
10187 const TargetRegisterClass *TRC = Subtarget->isThumb() ? &ARM::tGPRRegClass in EmitSjLjDispatchBlock() local
10737 const TargetRegisterClass *TRC = nullptr; in EmitStructByval() local
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| /netbsd-src/usr.bin/banner/ |
| H A D | banner.c | 104 #define TRC(q) (((q)-' ')&0177) macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyAsmPrinter.cpp | 62 const TargetRegisterClass *TRC = MRI->getRegClass(RegNo); in getRegType() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 498 const TargetRegisterClass *TRC = in EmitSubregNode() local
654 const TargetRegisterClass *TRC = MRI->getRegClass(SubReg); in EmitRegSequence() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 496 const TargetRegisterClass &TRC = *getRegClass(Reg); in getMaxLaneMaskForVReg() local
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| H A D | RegAllocPBQP.cpp | 617 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph() local
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| H A D | LiveDebugVariables.cpp | 1437 const TargetRegisterClass *TRC = MRI.getRegClass(VirtReg); in rewriteLocations() local
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| /netbsd-src/usr.sbin/lpr/lpd/ |
| H A D | printjob.c | 1063 #define TRC(q) (((q)-' ')&0177) macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 563 const auto *TRC = TII->getRegClass(TII->get(LoadInst->getOpcode()), 0, TRI, in getRegSizeInBytes() local
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/AST/ |
| H A D | ASTNodeTraverser.h | 405 if (const Expr *TRC = D->getTrailingRequiresClause()) in VisitFunctionDecl() local
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| H A D | Decl.h | 2438 if (auto *TRC = getTrailingRequiresClause()) in getAssociatedConstraints() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Sema/ |
| H A D | SemaTemplateVariadic.cpp | 966 if (Expr *TRC = D.getTrailingRequiresClause()) in containsUnexpandedParameterPacks() local
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| H A D | SemaLookup.cpp | 5143 TypoDiagnosticGenerator TDG, TypoRecoveryCallback TRC, CorrectTypoKind Mode, in CorrectTypoDelayed()
5483 TypoRecoveryCallback TRC, in createDelayedTypo()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 1125 const TargetRegisterClass &TRC, in isOfRegClass()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 943 const TargetRegisterClass *TRC = MI.getOpcode() == PPC::ADD8 in simplifyCode() local
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| H A D | PPCISelDAGToDAG.cpp | 380 const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF, /*Kind=*/1); in SelectInlineAsmMemoryOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 71 DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {} in DstOp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1714 const TargetRegisterClass *TRC = in SelectInlineAsmMemoryOperand() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/AST/ |
| H A D | DeclTemplate.cpp | 232 if (const Expr *TRC = FD->getTrailingRequiresClause()) in getAssociatedConstraints() local
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Sema/ |
| H A D | DeclSpec.h | 2466 void setTrailingRequiresClause(Expr *TRC) { in setTrailingRequiresClause()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2015 const TargetRegisterClass *TRC; in createVR() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 379 const TargetRegisterClass *TRC = TRI->getPointerRegClass(*MF); in SelectInlineAsmMemoryOperand() local
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