/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1510 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), PerformDAGCombine() local 1526 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), PerformDAGCombine() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 617 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), SimplifyDemandedBits() local 633 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), SimplifyDemandedBits() local 648 SimplifyDemandedBits(SDValue Op,const APInt & DemandedBits,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth,bool AssumeSingleUse) const SimplifyDemandedBits() argument 1081 SimplifyDemandedBits(SDValue Op,const APInt & OriginalDemandedBits,const APInt & OriginalDemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth,bool AssumeSingleUse) const SimplifyDemandedBits() argument 2941 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), SimplifyDemandedVectorElts() local 3005 SimplifyDemandedVectorElts(SDValue Op,const APInt & OriginalDemandedElts,APInt & KnownUndef,APInt & KnownZero,TargetLoweringOpt & TLO,unsigned Depth,bool AssumeSingleUse) const SimplifyDemandedVectorElts() argument 3725 SimplifyDemandedVectorEltsForTargetNode(SDValue Op,const APInt & DemandedElts,APInt & KnownUndef,APInt & KnownZero,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedVectorEltsForTargetNode() argument 3737 SimplifyDemandedBitsForTargetNode(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedBitsForTargetNode() argument [all...] |
H A D | DAGCombiner.cpp | 337 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); SimplifyDemandedBits() local 1058 CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt & TLO) CommitTargetLoweringOpt() argument 1449 CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt & TLO) CommitTargetLoweringOpt() argument 1470 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); SimplifyDemandedBits() local 1489 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); SimplifyDemandedVectorElts() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3848 targetShrinkDemandedConstant(SDValue Op,const APInt & DemandedBits,const APInt & DemandedElts,TargetLoweringOpt & TLO) targetShrinkDemandedConstant() argument 3945 shouldSimplifyDemandedVectorElts(SDValue Op,const TargetLoweringOpt & TLO) shouldSimplifyDemandedVectorElts() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 5176 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), PerformDAGCombine() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1987 optimizeLogicalImm(SDValue Op,unsigned Size,uint64_t Imm,const APInt & Demanded,TargetLowering::TargetLoweringOpt & TLO,unsigned NewOpc) optimizeLogicalImm() argument 21225 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), performTBISimplification() local 26830 SimplifyDemandedBitsForTargetNode(SDValue Op,const APInt & OriginalDemandedBits,const APInt & OriginalDemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedBitsForTargetNode() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 40906 SimplifyDemandedVectorEltsForTargetShuffle(SDValue Op,const APInt & DemandedElts,unsigned MaskIndex,TargetLowering::TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedVectorEltsForTargetShuffle() argument 40973 SimplifyDemandedVectorEltsForTargetNode(SDValue Op,const APInt & DemandedElts,APInt & KnownUndef,APInt & KnownZero,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedVectorEltsForTargetNode() argument 41714 SimplifyDemandedBitsForTargetNode(SDValue Op,const APInt & OriginalDemandedBits,const APInt & OriginalDemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedBitsForTargetNode() argument 44698 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), combineVSelectToBLENDV() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 20256 SimplifyDemandedBitsForTargetNode(SDValue Op,const APInt & OriginalDemandedBits,const APInt & OriginalDemandedElts,KnownBits & Known,TargetLoweringOpt & TLO,unsigned Depth) const SimplifyDemandedBitsForTargetNode() argument [all...] |