1 /* Definitions of target machine for GNU compiler. VAX version. 2 Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5 This file is part of GNU CC. 6 7 GNU CC is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GNU CC is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GNU CC; see the file COPYING. If not, write to 19 the Free Software Foundation, 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22 23 /* Target CPU builtins. */ 24 #define TARGET_CPU_CPP_BUILTINS() \ 25 do \ 26 { \ 27 builtin_define ("__vax__"); \ 28 builtin_assert ("cpu=vax"); \ 29 builtin_assert ("machine=vax"); \ 30 if (TARGET_G_FLOAT) \ 31 { \ 32 builtin_define ("__GFLOAT"); \ 33 builtin_define ("__GFLOAT__"); \ 34 } \ 35 } \ 36 while (0) 37 38 #define VMS_TARGET 0 39 40 /* Use -J option for long branch support with Unix assembler. */ 41 42 #define ASM_SPEC "-J" 43 44 /* Choose proper libraries depending on float format. 45 Note that there are no profiling libraries for g-format. 46 Also use -lg for the sake of dbx. */ 47 48 #define LIB_SPEC "%{g:-lg}\ 49 %{mg:%{lm:-lmg} -lcg \ 50 %{p:%eprofiling not supported with -mg\n}\ 51 %{pg:%eprofiling not supported with -mg\n}}\ 52 %{!mg:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}" 53 54 /* Print subsidiary information on the compiler version in use. */ 55 56 #ifndef TARGET_NAME /* A more specific value might be supplied via -D. */ 57 #define TARGET_NAME "vax" 58 #endif 59 #define TARGET_VERSION fprintf (stderr, " (%s)", TARGET_NAME) 60 61 /* Run-time compilation parameters selecting different hardware subsets. */ 62 63 extern int target_flags; 64 65 #define MASK_UNIX_ASM 1 66 #define MASK_VAXC_ALIGNMENT 2 67 #define MASK_G_FLOAT 4 68 69 70 /* Macros used in the machine description to test the flags. */ 71 72 /* Nonzero if compiling code that Unix assembler can assemble. */ 73 #define TARGET_UNIX_ASM (target_flags & MASK_UNIX_ASM) 74 75 /* Nonzero if compiling with VAX-11 "C" style structure alignment */ 76 #define TARGET_VAXC_ALIGNMENT (target_flags & MASK_VAXC_ALIGNMENT) 77 78 /* Nonzero if compiling with `G'-format floating point */ 79 #define TARGET_G_FLOAT (target_flags & MASK_G_FLOAT) 80 81 /* Macro to define tables used to set the flags. 82 This is a list in braces of pairs in braces, 83 each pair being { "NAME", VALUE } 84 where VALUE is the bits to set or minus the bits to clear. 85 An empty string NAME is used to identify the default VALUE. */ 86 87 #define TARGET_SWITCHES \ 88 { {"unix", MASK_UNIX_ASM, \ 89 "Generate code for UNIX assembler"}, \ 90 {"gnu", -MASK_UNIX_ASM, \ 91 "Generate code for GNU assembler (gas)"}, \ 92 {"vaxc-alignment", MASK_VAXC_ALIGNMENT, \ 93 "Use VAXC structure conventions"}, \ 94 {"g", MASK_G_FLOAT, \ 95 "Generate GFLOAT double precision code"}, \ 96 {"g-float", MASK_G_FLOAT, \ 97 "Generate GFLOAT double precision code"}, \ 98 {"d", -MASK_G_FLOAT, \ 99 "Generate DFLOAT double precision code"}, \ 100 {"d-float", -MASK_G_FLOAT, \ 101 "Generate DFLOAT double precision code"}, \ 102 { "", TARGET_DEFAULT, 0}} 103 104 /* Default target_flags if no switches specified. */ 105 106 #ifndef TARGET_DEFAULT 107 #define TARGET_DEFAULT (MASK_UNIX_ASM) 108 #endif 109 110 #define OVERRIDE_OPTIONS override_options () 111 112 113 /* Target machine storage layout */ 114 115 /* Define this if most significant bit is lowest numbered 116 in instructions that operate on numbered bit-fields. 117 This is not true on the VAX. */ 118 #define BITS_BIG_ENDIAN 0 119 120 /* Define this if most significant byte of a word is the lowest numbered. */ 121 /* That is not true on the VAX. */ 122 #define BYTES_BIG_ENDIAN 0 123 124 /* Define this if most significant word of a multiword number is the lowest 125 numbered. */ 126 /* This is not true on the VAX. */ 127 #define WORDS_BIG_ENDIAN 0 128 129 /* Width of a word, in units (bytes). */ 130 #define UNITS_PER_WORD 4 131 132 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 133 #define PARM_BOUNDARY 32 134 135 /* Allocation boundary (in *bits*) for the code of a function. */ 136 #define FUNCTION_BOUNDARY 16 137 138 /* Alignment of field after `int : 0' in a structure. */ 139 #define EMPTY_FIELD_BOUNDARY (TARGET_VAXC_ALIGNMENT ? 8 : 32) 140 141 /* Every structure's size must be a multiple of this. */ 142 #define STRUCTURE_SIZE_BOUNDARY 8 143 144 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 145 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT) 146 147 /* No data type wants to be aligned rounder than this. */ 148 #define BIGGEST_ALIGNMENT 32 149 150 /* No structure field wants to be aligned rounder than this. */ 151 #define BIGGEST_FIELD_ALIGNMENT (TARGET_VAXC_ALIGNMENT ? 8 : 32) 152 153 /* Set this nonzero if move instructions will actually fail to work 154 when given unaligned data. */ 155 #define STRICT_ALIGNMENT 0 156 157 /* Let's keep the stack somewhat aligned. */ 158 #define STACK_BOUNDARY 32 159 160 /* The table of an ADDR_DIFF_VEC must be contiguous with the case 161 opcode, it is part of the case instruction. */ 162 #define ADDR_VEC_ALIGN(ADDR_VEC) 0 163 164 /* Standard register usage. */ 165 166 /* Number of actual hardware registers. 167 The hardware registers are assigned numbers for the compiler 168 from 0 to just below FIRST_PSEUDO_REGISTER. 169 All registers that the compiler knows about must be given numbers, 170 even those that are not normally considered general registers. */ 171 #define FIRST_PSEUDO_REGISTER 16 172 173 /* 1 for registers that have pervasive standard uses 174 and are not available for the register allocator. 175 On the VAX, these are the AP, FP, SP and PC. */ 176 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} 177 178 /* 1 for registers not available across function calls. 179 These must include the FIXED_REGISTERS and also any 180 registers that can be used without being saved. 181 The latter must include the registers where values are returned 182 and the register where structure-value addresses are passed. 183 Aside from that, you can include as many other registers as you like. */ 184 #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} 185 186 /* Return number of consecutive hard regs needed starting at reg REGNO 187 to hold something of mode MODE. 188 This is ordinarily the length in words of a value of mode MODE 189 but can be less for certain modes in special long registers. 190 On the VAX, all registers are one word long. */ 191 #define HARD_REGNO_NREGS(REGNO, MODE) \ 192 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 193 194 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. 195 On the VAX, all registers can hold all modes. */ 196 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 197 198 /* Value is 1 if it is a good idea to tie two pseudo registers 199 when one has mode MODE1 and one has mode MODE2. 200 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 201 for any hard reg, then this must be 0 for correct output. */ 202 #define MODES_TIEABLE_P(MODE1, MODE2) 1 203 204 /* Specify the registers used for certain standard purposes. 205 The values of these macros are register numbers. */ 206 207 /* VAX pc is overloaded on a register. */ 208 #define PC_REGNUM 15 209 210 /* Register to use for pushing function arguments. */ 211 #define STACK_POINTER_REGNUM 14 212 213 /* Base register for access to local variables of the function. */ 214 #define FRAME_POINTER_REGNUM 13 215 216 /* Value should be nonzero if functions must have frame pointers. 217 Zero means the frame pointer need not be set up (and parms 218 may be accessed via the stack pointer) in functions that seem suitable. 219 This is computed in `reload', in reload1.c. */ 220 #define FRAME_POINTER_REQUIRED 1 221 222 /* Base register for access to arguments of the function. */ 223 #define ARG_POINTER_REGNUM 12 224 225 /* Register in which static-chain is passed to a function. */ 226 #define STATIC_CHAIN_REGNUM 0 227 228 /* Register in which address to store a structure value 229 is passed to a function. */ 230 #define STRUCT_VALUE_REGNUM 1 231 232 /* Define the classes of registers for register constraints in the 233 machine description. Also define ranges of constants. 234 235 One of the classes must always be named ALL_REGS and include all hard regs. 236 If there is more than one class, another class must be named NO_REGS 237 and contain no registers. 238 239 The name GENERAL_REGS must be the name of a class (or an alias for 240 another name such as ALL_REGS). This is the class of registers 241 that is allowed by "g" or "r" in a register constraint. 242 Also, registers outside this class are allocated only when 243 instructions express preferences for them. 244 245 The classes must be numbered in nondecreasing order; that is, 246 a larger-numbered class must never be contained completely 247 in a smaller-numbered class. 248 249 For any two classes, it is very desirable that there be another 250 class that represents their union. */ 251 252 /* The VAX has only one kind of registers, so NO_REGS and ALL_REGS 253 are the only classes. */ 254 255 enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; 256 257 #define N_REG_CLASSES (int) LIM_REG_CLASSES 258 259 /* Since GENERAL_REGS is the same class as ALL_REGS, 260 don't give it a different class number; just make it an alias. */ 261 262 #define GENERAL_REGS ALL_REGS 263 264 /* Give names of register classes as strings for dump file. */ 265 266 #define REG_CLASS_NAMES \ 267 {"NO_REGS", "ALL_REGS" } 268 269 /* Define which registers fit in which classes. 270 This is an initializer for a vector of HARD_REG_SET 271 of length N_REG_CLASSES. */ 272 273 #define REG_CLASS_CONTENTS {{0}, {0xffff}} 274 275 /* The same information, inverted: 276 Return the class number of the smallest class containing 277 reg number REGNO. This could be a conditional expression 278 or could index an array. */ 279 280 #define REGNO_REG_CLASS(REGNO) ALL_REGS 281 282 /* The class value for index registers, and the one for base regs. */ 283 284 #define INDEX_REG_CLASS ALL_REGS 285 #define BASE_REG_CLASS ALL_REGS 286 287 /* Get reg_class from a letter such as appears in the machine description. */ 288 289 #define REG_CLASS_FROM_LETTER(C) NO_REGS 290 291 /* The letters I, J, K, L, M, N, and O in a register constraint string 292 can be used to stand for particular ranges of immediate operands. 293 This macro defines what the ranges are. 294 C is the letter, and VALUE is a constant value. 295 Return 1 if VALUE is in the range specified by C. 296 297 `I' is the constant zero. 298 `J' is a value between 0 .. 63 (inclusive) 299 `K' is a value between -128 and 127 (inclusive) 300 'L' is a value between -32768 and 32767 (inclusive) 301 `M' is a value between 0 and 255 (inclusive) 302 'N' is a value between 0 and 65535 (inclusive) 303 `O' is a value between -63 and -1 (inclusive) */ 304 305 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 306 ( (C) == 'I' ? (VALUE) == 0 \ 307 : (C) == 'J' ? 0 <= (VALUE) && (VALUE) < 64 \ 308 : (C) == 'O' ? -63 <= (VALUE) && (VALUE) < 0 \ 309 : (C) == 'K' ? -128 <= (VALUE) && (VALUE) < 128 \ 310 : (C) == 'M' ? 0 <= (VALUE) && (VALUE) < 256 \ 311 : (C) == 'L' ? -32768 <= (VALUE) && (VALUE) < 32768 \ 312 : (C) == 'N' ? 0 <= (VALUE) && (VALUE) < 65536 \ 313 : 0) 314 315 /* Similar, but for floating constants, and defining letters G and H. 316 Here VALUE is the CONST_DOUBLE rtx itself. 317 318 `G' is a floating-point zero. */ 319 320 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 321 ((C) == 'G' ? ((VALUE) == CONST0_RTX (DFmode) \ 322 || (VALUE) == CONST0_RTX (SFmode)) \ 323 : 0) 324 325 /* Given an rtx X being reloaded into a reg required to be 326 in class CLASS, return the class of reg to actually use. 327 In general this is just CLASS; but on some machines 328 in some cases it is preferable to use a more restrictive class. */ 329 330 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) 331 332 /* Return the maximum number of consecutive registers 333 needed to represent mode MODE in a register of class CLASS. */ 334 /* On the VAX, this is always the size of MODE in words, 335 since all registers are the same size. */ 336 #define CLASS_MAX_NREGS(CLASS, MODE) \ 337 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 338 339 /* Stack layout; function entry, exit and calling. */ 340 341 /* Define this if pushing a word on the stack 342 makes the stack pointer a smaller address. */ 343 #define STACK_GROWS_DOWNWARD 344 345 /* Define this if the nominal address of the stack frame 346 is at the high-address end of the local variables; 347 that is, each additional local variable allocated 348 goes at a more negative offset in the frame. */ 349 #define FRAME_GROWS_DOWNWARD 350 351 /* Offset within stack frame to start allocating local variables at. 352 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 353 first local allocated. Otherwise, it is the offset to the BEGINNING 354 of the first local allocated. */ 355 #define STARTING_FRAME_OFFSET 0 356 357 /* Given an rtx for the address of a frame, 358 return an rtx for the address of the word in the frame 359 that holds the dynamic chain--the previous frame's address. */ 360 #define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12) 361 362 /* If we generate an insn to push BYTES bytes, 363 this says how many the stack pointer really advances by. 364 On the VAX, -(sp) pushes only the bytes of the operands. */ 365 #define PUSH_ROUNDING(BYTES) (BYTES) 366 367 /* Offset of first parameter from the argument pointer register value. */ 368 #define FIRST_PARM_OFFSET(FNDECL) 4 369 370 /* Value is the number of bytes of arguments automatically 371 popped when returning from a subroutine call. 372 FUNDECL is the declaration node of the function (as a tree), 373 FUNTYPE is the data type of the function (as a tree), 374 or for a library call it is an identifier node for the subroutine name. 375 SIZE is the number of bytes of arguments passed on the stack. 376 377 On the VAX, the RET insn pops a maximum of 255 args for any function. */ 378 379 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \ 380 ((SIZE) > 255*4 ? 0 : (SIZE)) 381 382 /* Define how to find the value returned by a function. 383 VALTYPE is the data type of the value (as a tree). 384 If the precise function being called is known, FUNC is its FUNCTION_DECL; 385 otherwise, FUNC is 0. */ 386 387 /* On the VAX the return value is in R0 regardless. */ 388 389 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 390 gen_rtx_REG (TYPE_MODE (VALTYPE), 0) 391 392 /* Define how to find the value returned by a library function 393 assuming the value has mode MODE. */ 394 395 /* On the VAX the return value is in R0 regardless. */ 396 397 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) 398 399 /* Define this if PCC uses the nonreentrant convention for returning 400 structure and union values. */ 401 402 #define PCC_STATIC_STRUCT_RETURN 403 404 /* 1 if N is a possible register number for a function value. 405 On the VAX, R0 is the only register thus used. */ 406 407 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) 408 409 /* 1 if N is a possible register number for function argument passing. 410 On the VAX, no registers are used in this way. */ 411 412 #define FUNCTION_ARG_REGNO_P(N) 0 413 414 /* Define a data type for recording info about an argument list 415 during the scan of that argument list. This data type should 416 hold all necessary information about the function itself 417 and about the args processed so far, enough to enable macros 418 such as FUNCTION_ARG to determine where the next arg should go. 419 420 On the VAX, this is a single integer, which is a number of bytes 421 of arguments scanned so far. */ 422 423 #define CUMULATIVE_ARGS int 424 425 /* Initialize a variable CUM of type CUMULATIVE_ARGS 426 for a call to a function whose data type is FNTYPE. 427 For a library call, FNTYPE is 0. 428 429 On the VAX, the offset starts at 0. */ 430 431 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ 432 ((CUM) = 0) 433 434 /* Update the data in CUM to advance over an argument 435 of mode MODE and data type TYPE. 436 (TYPE is null for libcalls where that information may not be available.) */ 437 438 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 439 ((CUM) += ((MODE) != BLKmode \ 440 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 441 : (int_size_in_bytes (TYPE) + 3) & ~3)) 442 443 /* Define where to put the arguments to a function. 444 Value is zero to push the argument on the stack, 445 or a hard register in which to store the argument. 446 447 MODE is the argument's machine mode. 448 TYPE is the data type of the argument (as a tree). 449 This is null for libcalls where that information may 450 not be available. 451 CUM is a variable of type CUMULATIVE_ARGS which gives info about 452 the preceding args and about the function being called. 453 NAMED is nonzero if this argument is a named parameter 454 (otherwise it is an extra parameter matching an ellipsis). */ 455 456 /* On the VAX all args are pushed. */ 457 458 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0 459 460 /* Output assembler code to FILE to increment profiler label # LABELNO 461 for profiling a function entry. */ 462 463 #define VAX_FUNCTION_PROFILER_NAME "mcount" 464 #define FUNCTION_PROFILER(FILE, LABELNO) \ 465 do \ 466 { \ 467 char label[256]; \ 468 ASM_GENERATE_INTERNAL_LABEL (label, "LP", (LABELNO)); \ 469 fprintf (FILE, "\tmovab "); \ 470 assemble_name (FILE, label); \ 471 asm_fprintf (FILE, ",%Rr0\n\tjsb %s\n", \ 472 VAX_FUNCTION_PROFILER_NAME); \ 473 } \ 474 while (0) 475 476 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 477 the stack pointer does not matter. The value is tested only in 478 functions that have frame pointers. 479 No definition is equivalent to always zero. */ 480 481 #define EXIT_IGNORE_STACK 1 482 483 /* Store in the variable DEPTH the initial difference between the 484 frame pointer reg contents and the stack pointer reg contents, 485 as of the start of the function body. This depends on the layout 486 of the fixed parts of the stack frame and on how registers are saved. 487 488 On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this 489 macro doesn't matter. But it must be defined. */ 490 491 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0; 492 493 /* Output assembler code for a block containing the constant parts 494 of a trampoline, leaving space for the variable parts. */ 495 496 /* On the VAX, the trampoline contains an entry mask and two instructions: 497 .word NN 498 movl $STATIC,r0 (store the functions static chain) 499 jmp *$FUNCTION (jump to function code at address FUNCTION) */ 500 501 #define TRAMPOLINE_TEMPLATE(FILE) \ 502 { \ 503 assemble_aligned_integer (2, const0_rtx); \ 504 assemble_aligned_integer (2, GEN_INT (0x8fd0)); \ 505 assemble_aligned_integer (4, const0_rtx); \ 506 assemble_aligned_integer (1, GEN_INT (0x50 + STATIC_CHAIN_REGNUM)); \ 507 assemble_aligned_integer (2, GEN_INT (0x9f17)); \ 508 assemble_aligned_integer (4, const0_rtx); \ 509 } 510 511 /* Length in units of the trampoline for entering a nested function. */ 512 513 #define TRAMPOLINE_SIZE 15 514 515 /* Emit RTL insns to initialize the variable parts of a trampoline. 516 FNADDR is an RTX for the address of the function's pure code. 517 CXT is an RTX for the static chain value for the function. */ 518 519 /* We copy the register-mask from the function's pure code 520 to the start of the trampoline. */ 521 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 522 { \ 523 emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \ 524 gen_rtx_MEM (HImode, FNADDR)); \ 525 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ 526 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \ 527 plus_constant (FNADDR, 2)); \ 528 emit_insn (gen_sync_istream ()); \ 529 } 530 531 /* Byte offset of return address in a stack frame. The "saved PC" field 532 is in element [4] when treating the frame as an array of longwords. */ 533 534 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */ 535 536 /* A C expression whose value is RTL representing the value of the return 537 address for the frame COUNT steps up from the current frame. 538 FRAMEADDR is already the frame pointer of the COUNT frame, so we 539 can ignore COUNT. */ 540 541 #define RETURN_ADDR_RTX(COUNT, FRAME) \ 542 ((COUNT == 0) \ 543 ? gen_rtx_MEM (Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \ 544 : (rtx) 0) 545 546 547 /* Addressing modes, and classification of registers for them. */ 548 549 #define HAVE_POST_INCREMENT 1 550 /* #define HAVE_POST_DECREMENT 0 */ 551 552 #define HAVE_PRE_DECREMENT 1 553 /* #define HAVE_PRE_INCREMENT 0 */ 554 555 /* Macros to check register numbers against specific register classes. */ 556 557 /* These assume that REGNO is a hard or pseudo reg number. 558 They give nonzero only if REGNO is a hard reg of the suitable class 559 or a pseudo reg currently allocated to a suitable hard reg. 560 Since they use reg_renumber, they are safe only once reg_renumber 561 has been allocated, which happens in local-alloc.c. */ 562 563 #define REGNO_OK_FOR_INDEX_P(regno) \ 564 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0) 565 #define REGNO_OK_FOR_BASE_P(regno) \ 566 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0) 567 568 /* Maximum number of registers that can appear in a valid memory address. */ 569 570 #define MAX_REGS_PER_ADDRESS 2 571 572 /* 1 if X is an rtx for a constant that is a valid address. */ 573 574 #define CONSTANT_ADDRESS_P(X) \ 575 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 576 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ 577 || GET_CODE (X) == HIGH) 578 579 /* Nonzero if the constant value X is a legitimate general operand. 580 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 581 582 #define LEGITIMATE_CONSTANT_P(X) 1 583 584 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 585 and check its validity for a certain class. 586 We have two alternate definitions for each of them. 587 The usual definition accepts all pseudo regs; the other rejects 588 them unless they have been allocated suitable hard regs. 589 The symbol REG_OK_STRICT causes the latter definition to be used. 590 591 Most source files want to accept pseudo regs in the hope that 592 they will get allocated to the class that the insn wants them to be in. 593 Source files for reload pass need to be strict. 594 After reload, it makes no difference, since pseudo regs have 595 been eliminated by then. */ 596 597 #ifndef REG_OK_STRICT 598 599 /* Nonzero if X is a hard reg that can be used as an index 600 or if it is a pseudo reg. */ 601 #define REG_OK_FOR_INDEX_P(X) 1 602 /* Nonzero if X is a hard reg that can be used as a base reg 603 or if it is a pseudo reg. */ 604 #define REG_OK_FOR_BASE_P(X) 1 605 606 #else 607 608 /* Nonzero if X is a hard reg that can be used as an index. */ 609 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 610 /* Nonzero if X is a hard reg that can be used as a base reg. */ 611 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 612 613 #endif 614 615 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 616 that is a valid memory address for an instruction. 617 The MODE argument is the machine mode for the MEM expression 618 that wants to use this address. 619 620 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 621 except for CONSTANT_ADDRESS_P which is actually machine-independent. */ 622 623 #ifdef NO_EXTERNAL_INDIRECT_ADDRESS 624 625 /* Zero if this contains a (CONST (PLUS (SYMBOL_REF) (...))) and the 626 symbol in the SYMBOL_REF is an external symbol. */ 627 628 #define INDIRECTABLE_CONSTANT_P(X) \ 629 (! (GET_CODE ((X)) == CONST \ 630 && GET_CODE (XEXP ((X), 0)) == PLUS \ 631 && GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \ 632 && SYMBOL_REF_FLAG (XEXP (XEXP ((X), 0), 0)))) 633 634 /* Re-definition of CONSTANT_ADDRESS_P, which is true only when there 635 are no SYMBOL_REFs for external symbols present. */ 636 637 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \ 638 (GET_CODE (X) == LABEL_REF \ 639 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_FLAG (X)) \ 640 || (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P(X)) \ 641 || GET_CODE (X) == CONST_INT) 642 643 644 /* Nonzero if X is an address which can be indirected. External symbols 645 could be in a sharable image library, so we disallow those. */ 646 647 #define INDIRECTABLE_ADDRESS_P(X) \ 648 (INDIRECTABLE_CONSTANT_ADDRESS_P (X) \ 649 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 650 || (GET_CODE (X) == PLUS \ 651 && GET_CODE (XEXP (X, 0)) == REG \ 652 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 653 && INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1)))) 654 655 #else /* not NO_EXTERNAL_INDIRECT_ADDRESS */ 656 657 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) CONSTANT_ADDRESS_P(X) 658 659 /* Nonzero if X is an address which can be indirected. */ 660 #define INDIRECTABLE_ADDRESS_P(X) \ 661 (CONSTANT_ADDRESS_P (X) \ 662 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ 663 || (GET_CODE (X) == PLUS \ 664 && GET_CODE (XEXP (X, 0)) == REG \ 665 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 666 && CONSTANT_ADDRESS_P (XEXP (X, 1)))) 667 668 #endif /* not NO_EXTERNAL_INDIRECT_ADDRESS */ 669 670 /* Go to ADDR if X is a valid address not using indexing. 671 (This much is the easy part.) */ 672 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ 673 { register rtx xfoob = (X); \ 674 if (GET_CODE (xfoob) == REG) \ 675 { \ 676 extern rtx *reg_equiv_mem; \ 677 if (! reload_in_progress \ 678 || reg_equiv_mem[REGNO (xfoob)] == 0 \ 679 || INDIRECTABLE_ADDRESS_P (reg_equiv_mem[REGNO (xfoob)])) \ 680 goto ADDR; \ 681 } \ 682 if (CONSTANT_ADDRESS_P (xfoob)) goto ADDR; \ 683 if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \ 684 xfoob = XEXP (X, 0); \ 685 if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \ 686 goto ADDR; \ 687 if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ 688 && GET_CODE (xfoob) == REG && REG_OK_FOR_BASE_P (xfoob)) \ 689 goto ADDR; } 690 691 /* 1 if PROD is either a reg times size of mode MODE and MODE is less 692 than or equal 8 bytes, or just a reg if MODE is one byte. 693 This macro's expansion uses the temporary variables xfoo0 and xfoo1 694 that must be declared in the surrounding context. */ 695 #define INDEX_TERM_P(PROD, MODE) \ 696 (GET_MODE_SIZE (MODE) == 1 \ 697 ? (GET_CODE (PROD) == REG && REG_OK_FOR_BASE_P (PROD)) \ 698 : (GET_CODE (PROD) == MULT && GET_MODE_SIZE (MODE) <= 8 \ 699 && \ 700 (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \ 701 ((((GET_CODE (xfoo0) == CONST_INT \ 702 && GET_CODE (xfoo1) == REG) \ 703 && INTVAL (xfoo0) == (int)GET_MODE_SIZE (MODE)) \ 704 && REG_OK_FOR_INDEX_P (xfoo1)) \ 705 || \ 706 (((GET_CODE (xfoo1) == CONST_INT \ 707 && GET_CODE (xfoo0) == REG) \ 708 && INTVAL (xfoo1) == (int)GET_MODE_SIZE (MODE)) \ 709 && REG_OK_FOR_INDEX_P (xfoo0)))))) 710 711 /* Go to ADDR if X is the sum of a register 712 and a valid index term for mode MODE. */ 713 #define GO_IF_REG_PLUS_INDEX(X, MODE, ADDR) \ 714 { register rtx xfooa; \ 715 if (GET_CODE (X) == PLUS) \ 716 { if (GET_CODE (XEXP (X, 0)) == REG \ 717 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ 718 && (xfooa = XEXP (X, 1), \ 719 INDEX_TERM_P (xfooa, MODE))) \ 720 goto ADDR; \ 721 if (GET_CODE (XEXP (X, 1)) == REG \ 722 && REG_OK_FOR_BASE_P (XEXP (X, 1)) \ 723 && (xfooa = XEXP (X, 0), \ 724 INDEX_TERM_P (xfooa, MODE))) \ 725 goto ADDR; } } 726 727 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 728 { register rtx xfoo, xfoo0, xfoo1; \ 729 GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ 730 if (GET_CODE (X) == PLUS) \ 731 { /* Handle <address>[index] represented with index-sum outermost */\ 732 xfoo = XEXP (X, 0); \ 733 if (INDEX_TERM_P (xfoo, MODE)) \ 734 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 1), ADDR); } \ 735 xfoo = XEXP (X, 1); \ 736 if (INDEX_TERM_P (xfoo, MODE)) \ 737 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 0), ADDR); } \ 738 /* Handle offset(reg)[index] with offset added outermost */ \ 739 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 0))) \ 740 { if (GET_CODE (XEXP (X, 1)) == REG \ 741 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ 742 goto ADDR; \ 743 GO_IF_REG_PLUS_INDEX (XEXP (X, 1), MODE, ADDR); } \ 744 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))) \ 745 { if (GET_CODE (XEXP (X, 0)) == REG \ 746 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ 747 goto ADDR; \ 748 GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR); } } } 749 750 /* Try machine-dependent ways of modifying an illegitimate address 751 to be legitimate. If we find one, return the new, valid address. 752 This macro is used in only one place: `memory_address' in explow.c. 753 754 OLDX is the address as it was before break_out_memory_refs was called. 755 In some cases it is useful to look at this to decide what needs to be done. 756 757 MODE and WIN are passed so that this macro can use 758 GO_IF_LEGITIMATE_ADDRESS. 759 760 It is always safe for this macro to do nothing. It exists to recognize 761 opportunities to optimize the output. 762 763 For the VAX, nothing needs to be done. */ 764 765 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {} 766 767 /* Go to LABEL if ADDR (a legitimate address expression) 768 has an effect that depends on the machine mode it is used for. 769 On the VAX, the predecrement and postincrement address depend thus 770 (the amount of decrement or increment being the length of the operand) 771 and all indexed address depend thus (because the index scale factor 772 is the length of the operand). */ 773 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 774 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \ 775 goto LABEL; \ 776 if (GET_CODE (ADDR) == PLUS) \ 777 { if (CONSTANT_ADDRESS_P (XEXP (ADDR, 0)) \ 778 && GET_CODE (XEXP (ADDR, 1)) == REG); \ 779 else if (CONSTANT_ADDRESS_P (XEXP (ADDR, 1)) \ 780 && GET_CODE (XEXP (ADDR, 0)) == REG); \ 781 else goto LABEL; }} 782 783 /* Specify the machine mode that this machine uses 784 for the index in the tablejump instruction. */ 785 #define CASE_VECTOR_MODE HImode 786 787 /* Define as C expression which evaluates to nonzero if the tablejump 788 instruction expects the table to contain offsets from the address of the 789 table. 790 Do not define this if the table should contain absolute addresses. */ 791 #define CASE_VECTOR_PC_RELATIVE 1 792 793 /* Indicate that jump tables go in the text section. This is 794 necessary when compiling PIC code. */ 795 #define JUMP_TABLES_IN_TEXT_SECTION 1 796 797 /* Define this as 1 if `char' should by default be signed; else as 0. */ 798 #define DEFAULT_SIGNED_CHAR 1 799 800 /* This flag, if defined, says the same insns that convert to a signed fixnum 801 also convert validly to an unsigned one. */ 802 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 803 804 /* Max number of bytes we can move from memory to memory 805 in one reasonably fast instruction. */ 806 #define MOVE_MAX 8 807 808 /* Nonzero if access to memory by bytes is slow and undesirable. */ 809 #define SLOW_BYTE_ACCESS 0 810 811 /* Define if shifts truncate the shift count 812 which implies one can omit a sign-extension or zero-extension 813 of a shift count. */ 814 /* #define SHIFT_COUNT_TRUNCATED */ 815 816 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 817 is done just by pretending it is already truncated. */ 818 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 819 820 /* When a prototype says `char' or `short', really pass an `int'. 821 (On the VAX, this is required for system-library compatibility.) */ 822 #define PROMOTE_PROTOTYPES 1 823 824 /* Specify the machine mode that pointers have. 825 After generation of rtl, the compiler makes no further distinction 826 between pointers and any other objects of this machine mode. */ 827 #define Pmode SImode 828 829 /* A function address in a call instruction 830 is a byte address (for indexing purposes) 831 so give the MEM rtx a byte's mode. */ 832 #define FUNCTION_MODE QImode 833 834 /* This machine doesn't use IEEE floats. */ 835 836 #define TARGET_FLOAT_FORMAT VAX_FLOAT_FORMAT 837 838 /* Compute the cost of computing a constant rtl expression RTX 839 whose rtx-code is CODE. The body of this macro is a portion 840 of a switch statement. If the code is computed here, 841 return it with a return statement. Otherwise, break from the switch. */ 842 843 /* On a VAX, constants from 0..63 are cheap because they can use the 844 1 byte literal constant format. compare to -1 should be made cheap 845 so that decrement-and-branch insns can be formed more easily (if 846 the value -1 is copied to a register some decrement-and-branch patterns 847 will not match). */ 848 849 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 850 case CONST_INT: \ 851 if (INTVAL (RTX) == 0) return 0; \ 852 if ((OUTER_CODE) == AND) \ 853 return ((unsigned) ~INTVAL (RTX) <= 077) ? 1 : 2; \ 854 if ((unsigned) INTVAL (RTX) <= 077) return 1; \ 855 if ((OUTER_CODE) == COMPARE && INTVAL (RTX) == -1) \ 856 return 1; \ 857 if ((OUTER_CODE) == PLUS && (unsigned) -INTVAL (RTX) <= 077)\ 858 return 1; \ 859 case CONST: \ 860 case LABEL_REF: \ 861 case SYMBOL_REF: \ 862 return 3; \ 863 case CONST_DOUBLE: \ 864 if (GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \ 865 return vax_float_literal (RTX) ? 5 : 8; \ 866 else \ 867 return (((CONST_DOUBLE_HIGH (RTX) == 0 \ 868 && (unsigned) CONST_DOUBLE_LOW (RTX) < 64) \ 869 || ((OUTER_CODE) == PLUS \ 870 && CONST_DOUBLE_HIGH (RTX) == -1 \ 871 && (unsigned)-CONST_DOUBLE_LOW (RTX) < 64)) \ 872 ? 2 : 5); 873 874 #define RTX_COSTS(RTX,CODE,OUTER_CODE) case FIX: case FLOAT: \ 875 case MULT: case DIV: case UDIV: case MOD: case UMOD: \ 876 case ASHIFT: case LSHIFTRT: case ASHIFTRT: \ 877 case ROTATE: case ROTATERT: case PLUS: case MINUS: case IOR: \ 878 case XOR: case AND: case NEG: case NOT: case ZERO_EXTRACT: \ 879 case SIGN_EXTRACT: case MEM: return vax_rtx_cost(RTX) 880 881 #define ADDRESS_COST(RTX) (1 + (GET_CODE (RTX) == REG ? 0 : vax_address_cost(RTX))) 882 883 /* Specify the cost of a branch insn; roughly the number of extra insns that 884 should be added to avoid a branch. 885 886 Branches are extremely cheap on the VAX while the shift insns often 887 used to replace branches can be expensive. */ 888 889 #define BRANCH_COST 0 890 891 /* 892 * We can use the BSD C library routines for the libgcc calls that are 893 * still generated, since that's what they boil down to anyways. 894 */ 895 896 #define UDIVSI3_LIBCALL "*udiv" 897 #define UMODSI3_LIBCALL "*urem" 898 899 /* Tell final.c how to eliminate redundant test instructions. */ 900 901 /* Here we define machine-dependent flags and fields in cc_status 902 (see `conditions.h'). No extra ones are needed for the VAX. */ 903 904 /* Store in cc_status the expressions 905 that the condition codes will describe 906 after execution of an instruction whose pattern is EXP. 907 Do not alter them if the instruction would not alter the cc's. */ 908 909 #define NOTICE_UPDATE_CC(EXP, INSN) \ 910 { if (GET_CODE (EXP) == SET) \ 911 { if (GET_CODE (SET_SRC (EXP)) == CALL) \ 912 CC_STATUS_INIT; \ 913 else if (GET_CODE (SET_DEST (EXP)) != ZERO_EXTRACT \ 914 && GET_CODE (SET_DEST (EXP)) != PC) \ 915 { \ 916 cc_status.flags = 0; \ 917 /* The integer operations below don't set carry or \ 918 set it in an incompatible way. That's ok though \ 919 as the Z bit is all we need when doing unsigned \ 920 comparisons on the result of these insns (since \ 921 they're always with 0). Set CC_NO_OVERFLOW to \ 922 generate the correct unsigned branches. */ \ 923 switch (GET_CODE (SET_SRC (EXP))) \ 924 { \ 925 case NEG: \ 926 if (GET_MODE_CLASS (GET_MODE (EXP)) == MODE_FLOAT)\ 927 break; \ 928 case AND: \ 929 case IOR: \ 930 case XOR: \ 931 case NOT: \ 932 case MEM: \ 933 case REG: \ 934 cc_status.flags = CC_NO_OVERFLOW; \ 935 break; \ 936 default: \ 937 break; \ 938 } \ 939 cc_status.value1 = SET_DEST (EXP); \ 940 cc_status.value2 = SET_SRC (EXP); } } \ 941 else if (GET_CODE (EXP) == PARALLEL \ 942 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ 943 { \ 944 if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \ 945 CC_STATUS_INIT; \ 946 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) != PC) \ 947 { cc_status.flags = 0; \ 948 cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \ 949 cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); } \ 950 else \ 951 /* PARALLELs whose first element sets the PC are aob, \ 952 sob insns. They do change the cc's. */ \ 953 CC_STATUS_INIT; } \ 954 else CC_STATUS_INIT; \ 955 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ 956 && cc_status.value2 \ 957 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ 958 cc_status.value2 = 0; \ 959 if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM \ 960 && cc_status.value2 \ 961 && GET_CODE (cc_status.value2) == MEM) \ 962 cc_status.value2 = 0; } 963 /* Actual condition, one line up, should be that value2's address 964 depends on value1, but that is too much of a pain. */ 965 966 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \ 967 { if (cc_status.flags & CC_NO_OVERFLOW) \ 968 return NO_OV; \ 969 return NORMAL; } 970 971 /* Control the assembler format that we output. */ 972 973 /* Output at beginning of assembler file. */ 974 /* When debugging, we want to output an extra dummy label so that gas 975 can distinguish between D_float and G_float prior to processing the 976 .stabs directive identifying type double. */ 977 978 #define ASM_FILE_START(FILE) \ 979 do { \ 980 fputs (ASM_APP_OFF, FILE); \ 981 if (write_symbols == DBX_DEBUG) \ 982 fprintf (FILE, "___vax_%c_doubles:\n", ASM_DOUBLE_CHAR); \ 983 } while (0) 984 985 986 /* Output to assembler file text saying following lines 987 may contain character constants, extra white space, comments, etc. */ 988 989 #define ASM_APP_ON "#APP\n" 990 991 /* Output to assembler file text saying following lines 992 no longer contain unusual constructs. */ 993 994 #define ASM_APP_OFF "#NO_APP\n" 995 996 /* Output before read-only data. */ 997 998 #define TEXT_SECTION_ASM_OP "\t.text" 999 1000 /* Output before writable data. */ 1001 1002 #define DATA_SECTION_ASM_OP "\t.data" 1003 1004 /* How to refer to registers in assembler output. 1005 This sequence is indexed by compiler's hard-register-number (see above). 1006 The register names will be prefixed by REGISTER_PREFIX, if any. */ 1007 1008 #define REGISTER_PREFIX "" 1009 #define REGISTER_NAMES \ 1010 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \ 1011 "r9", "r10", "r11", "ap", "fp", "sp", "pc"} 1012 1013 /* This is BSD, so it wants DBX format. */ 1014 1015 #define DBX_DEBUGGING_INFO 1 1016 1017 /* Do not break .stabs pseudos into continuations. */ 1018 1019 #define DBX_CONTIN_LENGTH 0 1020 1021 /* This is the char to use for continuation (in case we need to turn 1022 continuation back on). */ 1023 1024 #define DBX_CONTIN_CHAR '?' 1025 1026 /* Don't use the `xsfoo;' construct in DBX output; this system 1027 doesn't support it. */ 1028 1029 #define DBX_NO_XREFS 1030 1031 /* Output the .stabs for a C `static' variable in the data section. */ 1032 #define DBX_STATIC_STAB_DATA_SECTION 1033 1034 /* VAX specific: which type character is used for type double? */ 1035 1036 #define ASM_DOUBLE_CHAR (TARGET_G_FLOAT ? 'g' : 'd') 1037 1038 /* This is how to output a command to make the user-level label named NAME 1039 defined for reference from other files. */ 1040 1041 /* Globalizing directive for a label. */ 1042 #define GLOBAL_ASM_OP ".globl " 1043 1044 /* The prefix to add to user-visible assembler symbols. */ 1045 1046 #define USER_LABEL_PREFIX "_" 1047 1048 /* This is how to output an internal numbered label where 1049 PREFIX is the class of label and NUM is the number within the class. */ 1050 1051 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ 1052 fprintf (FILE, "%s%d:\n", PREFIX, NUM) 1053 1054 /* This is how to store into the string LABEL 1055 the symbol_ref name of an internal numbered label where 1056 PREFIX is the class of label and NUM is the number within the class. 1057 This is suitable for output with `assemble_name'. */ 1058 1059 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ 1060 sprintf (LABEL, "*%s%d", PREFIX, NUM) 1061 1062 /* This is how to output an insn to push a register on the stack. 1063 It need not be very fast code. */ 1064 1065 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ 1066 fprintf (FILE, "\tpushl %s\n", reg_names[REGNO]) 1067 1068 /* This is how to output an insn to pop a register from the stack. 1069 It need not be very fast code. */ 1070 1071 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ 1072 fprintf (FILE, "\tmovl (%s)+,%s\n", reg_names[STACK_POINTER_REGNUM], \ 1073 reg_names[REGNO]) 1074 1075 /* This is how to output an element of a case-vector that is absolute. 1076 (The VAX does not use such vectors, 1077 but we must define this macro anyway.) */ 1078 1079 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1080 do \ 1081 { \ 1082 char label[256]; \ 1083 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));\ 1084 fprintf (FILE, "\t.long "); \ 1085 assemble_name (FILE, label); \ 1086 fprintf (FILE, "\n"); \ 1087 } \ 1088 while (0) 1089 1090 /* This is how to output an element of a case-vector that is relative. */ 1091 1092 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1093 do \ 1094 { \ 1095 char label[256]; \ 1096 ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \ 1097 fprintf (FILE, "\t.word "); \ 1098 assemble_name (FILE, label); \ 1099 ASM_GENERATE_INTERNAL_LABEL (label, "L", (REL)); \ 1100 fprintf (FILE, "-"); \ 1101 assemble_name (FILE, label); \ 1102 fprintf (FILE, "\n"); \ 1103 } \ 1104 while (0) 1105 1106 /* This is how to output an assembler line 1107 that says to advance the location counter 1108 to a multiple of 2**LOG bytes. */ 1109 1110 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1111 fprintf (FILE, "\t.align %d\n", (LOG)) 1112 1113 /* This is how to output an assembler line 1114 that says to advance the location counter by SIZE bytes. */ 1115 1116 #define ASM_OUTPUT_SKIP(FILE,SIZE) \ 1117 fprintf (FILE, "\t.space %u\n", (SIZE)) 1118 1119 /* This says how to output an assembler line 1120 to define a global common symbol. */ 1121 1122 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1123 ( fputs (".comm ", (FILE)), \ 1124 assemble_name ((FILE), (NAME)), \ 1125 fprintf ((FILE), ",%u\n", (ROUNDED))) 1126 1127 /* This says how to output an assembler line 1128 to define a local common symbol. */ 1129 1130 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1131 ( fputs (".lcomm ", (FILE)), \ 1132 assemble_name ((FILE), (NAME)), \ 1133 fprintf ((FILE), ",%u\n", (ROUNDED))) 1134 1135 /* Store in OUTPUT a string (made with alloca) containing 1136 an assembler-name for a local static variable named NAME. 1137 LABELNO is an integer which is different for each call. */ 1138 1139 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 1140 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 1141 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) 1142 1143 /* Print an instruction operand X on file FILE. 1144 CODE is the code from the %-spec that requested printing this operand; 1145 if `%z3' was used to print operand 3, then CODE is 'z'. 1146 1147 VAX operand formatting codes: 1148 1149 letter print 1150 C reverse branch condition 1151 D 64-bit immediate operand 1152 B the low 8 bits of the complement of a constant operand 1153 H the low 16 bits of the complement of a constant operand 1154 M a mask for the N highest bits of a word 1155 N the complement of a constant integer operand 1156 P constant operand plus 1 1157 R 32 - constant operand 1158 b the low 8 bits of a negated constant operand 1159 h the low 16 bits of a negated constant operand 1160 # 'd' or 'g' depending on whether dfloat or gfloat is used 1161 | register prefix */ 1162 1163 /* The purpose of D is to get around a quirk or bug in VAX assembler 1164 whereby -1 in a 64-bit immediate operand means 0x00000000ffffffff, 1165 which is not a 64-bit minus one. */ 1166 1167 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1168 ((CODE) == '#' || (CODE) == '|') 1169 1170 #define PRINT_OPERAND(FILE, X, CODE) \ 1171 { if (CODE == '#') fputc (ASM_DOUBLE_CHAR, FILE); \ 1172 else if (CODE == '|') \ 1173 fputs (REGISTER_PREFIX, FILE); \ 1174 else if (CODE == 'C') \ 1175 fputs (rev_cond_name (X), FILE); \ 1176 else if (CODE == 'D' && GET_CODE (X) == CONST_INT && INTVAL (X) < 0) \ 1177 fprintf (FILE, "$0xffffffff%08x", INTVAL (X)); \ 1178 else if (CODE == 'P' && GET_CODE (X) == CONST_INT) \ 1179 fprintf (FILE, "$%d", INTVAL (X) + 1); \ 1180 else if (CODE == 'N' && GET_CODE (X) == CONST_INT) \ 1181 fprintf (FILE, "$%d", ~ INTVAL (X)); \ 1182 /* rotl instruction cannot deal with negative arguments. */ \ 1183 else if (CODE == 'R' && GET_CODE (X) == CONST_INT) \ 1184 fprintf (FILE, "$%d", 32 - INTVAL (X)); \ 1185 else if (CODE == 'H' && GET_CODE (X) == CONST_INT) \ 1186 fprintf (FILE, "$%d", 0xffff & ~ INTVAL (X)); \ 1187 else if (CODE == 'h' && GET_CODE (X) == CONST_INT) \ 1188 fprintf (FILE, "$%d", (short) - INTVAL (x)); \ 1189 else if (CODE == 'B' && GET_CODE (X) == CONST_INT) \ 1190 fprintf (FILE, "$%d", 0xff & ~ INTVAL (X)); \ 1191 else if (CODE == 'b' && GET_CODE (X) == CONST_INT) \ 1192 fprintf (FILE, "$%d", 0xff & - INTVAL (X)); \ 1193 else if (CODE == 'M' && GET_CODE (X) == CONST_INT) \ 1194 fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \ 1195 else if (GET_CODE (X) == REG) \ 1196 fprintf (FILE, "%s", reg_names[REGNO (X)]); \ 1197 else if (GET_CODE (X) == MEM) \ 1198 output_address (XEXP (X, 0)); \ 1199 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \ 1200 { char dstr[30]; \ 1201 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \ 1202 sizeof (dstr), 0, 1); \ 1203 fprintf (FILE, "$0f%s", dstr); } \ 1204 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == DFmode) \ 1205 { char dstr[30]; \ 1206 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \ 1207 sizeof (dstr), 0, 1); \ 1208 fprintf (FILE, "$0%c%s", ASM_DOUBLE_CHAR, dstr); } \ 1209 else { putc ('$', FILE); output_addr_const (FILE, X); }} 1210 1211 /* Print a memory operand whose address is X, on file FILE. 1212 This uses a function in output-vax.c. */ 1213 1214 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 1215 print_operand_address (FILE, ADDR) 1216 1217 /* This is a blatent lie. However, it's good enough, since we don't 1218 actually have any code whatsoever for which this isn't overridden 1219 by the proper FDE definition. */ 1220 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, PC_REGNUM) 1221 1222 /* Tell flow.c not to try and optimize away MEM dead stores, as its 1223 logic is confused by some of the addressing modes of the VAX. */ 1224 #define FLOW_DEAD_STORES_BROKEN_P 1225