| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1576 SDValue SuperReg = SDValue(Ld, 0); SelectLoad() local
1612 SDValue SuperReg = SDValue(Ld, 1); SelectPostLoad() local
1718 SDValue SuperReg = SDValue(WhilePair, 0); SelectPExtPair() local
1734 SDValue SuperReg = SDValue(WhilePair, 0); SelectWhilePair() local
1750 SDValue SuperReg = SDValue(Intrinsic, 0); SelectCVTIntrinsic() local
1789 SDValue SuperReg = SDValue(Intrinsic, 0); SelectDestructiveMultiIntrinsic() local
1819 SDValue SuperReg = SDValue(Load, 0); SelectPredicatedLoad() local
1854 SDValue SuperReg = SDValue(Load, 0); SelectContiguousMultiVectorLoad() local
1888 SDValue SuperReg = SDValue(Instruction, 0); SelectMultiVectorLuti() local
1913 SDValue SuperReg = SDValue(Intrinsic, 0); SelectClamp() local
2005 SDValue SuperReg = SDValue(Res, 0); SelectUnaryMultiIntrinsic() local
2153 SDValue SuperReg = SDValue(Ld, 0); SelectLoadLane() local
2201 SDValue SuperReg = SDValue(Ld, 1); SelectPostLoadLane() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CriticalAntiDepBreaker.cpp | 243 for (MCPhysReg SuperReg : TRI->superregs(Reg)) { in PrescanInstruction() local
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| H A D | AggressiveAntiDepBreaker.cpp | 536 unsigned SuperReg, unsigned AntiDepGroupIndex, RenameOrderType &RenameOrder, in FindSuitableFreeRegisters() argument
[all...] |
| H A D | PrologEpilogInserter.cpp | 460 for (const MCPhysReg &SuperReg : RegInfo->superregs(Reg)) { assignCalleeSavedSpillSlots() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 369 SDValue SuperReg = SDValue(Load, 0); selectVLSEG() local
410 SDValue SuperReg = SDValue(Load, 0); selectVLSEGFF() local
462 SDValue SuperReg = SDValue(Load, 0); selectVLXSEG() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2237 SDValue SuperReg = SDValue(VLd, 0); SelectVLD() local
2486 SDValue SuperReg; SelectVLDSTLane() local
3064 SDValue SuperReg = SDValue(VLdDup, 0); SelectVLDDup() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 233 Register SuperReg; member in llvm::PrologEpilogSGPRSpillBuilder
[all...] |
| H A D | SIRegisterInfo.cpp | 80 Register SuperReg; member
[all...] |
| H A D | SIInstrInfo.cpp | 5526 buildExtractSubReg(MachineBasicBlock::iterator MI,MachineRegisterInfo & MRI,const MachineOperand & SuperReg,const TargetRegisterClass * SuperRC,unsigned SubIdx,const TargetRegisterClass * SubRC) const buildExtractSubReg() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1672 MCRegister SuperReg = copyPhysReg() local
1681 MCRegister SuperReg = copyPhysReg() local
|