| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 402 auto *SubVecTy = FixedVectorType::get(Tp->getElementType(), SubVF); getShuffleCost() local
599 FixedVectorType *SubVecTy = getInterleavedMemoryOpCost() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPromoteAlloca.cpp | 418 auto *SubVecTy = FixedVectorType::get(VecEltTy, NumLoadedElts); promoteAllocaUserToVector() local
473 auto *SubVecTy = FixedVectorType::get(VecEltTy, NumWrittenElts); promoteAllocaUserToVector() local
[all...] |
| H A D | AMDGPUCodeGenPrepare.cpp | 1962 Type *SubVecTy = FixedVectorType::get(EltTy, SubVecSize); visitPHINode() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 168 Instruction *VecInst, unsigned NumSubVectors, FixedVectorType *SubVecTy, in decompose() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 1537 auto *SubVecTy = getInterleavedMemoryOpCost() local
|
| H A D | ARMISelLowering.cpp | 21809 auto *SubVecTy = FixedVectorType::get(EltTy, LaneLen); lowerInterleavedStore() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 3251 auto *SubVecTy = getInterleavedMemoryOpCost() local
|
| H A D | AArch64ISelLowering.cpp | 15837 auto *SubVecTy = FixedVectorType::get(EltTy, LaneLen); lowerInterleavedStore() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 3020 auto *SubVecTy = dyn_cast<FixedVectorType>(SubVec->getType()); visitCallInst() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1230 MVT SubVecTy = tyVector(ty(Ext), ElemTy); in insertHvxElementReg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 5901 VectorType *SubVecTy = cast<VectorType>(SubVec->getType()); visitIntrinsicCall() local
|