| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 178 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & CmpMask,int64_t & CmpValue) const analyzeCompare() argument
206 isRedundantFlagInstr(MachineInstr * CmpI,unsigned SrcReg,unsigned SrcReg2,int64_t ImmValue,MachineInstr * OI) isRedundantFlagInstr() argument
284 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 246 MCRegister SrcReg2 = MI.getOperand(1).getReg(); expandLongCondBr() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 442 Register SrcReg2 = MI.getOperand(3).getReg(); in optimizeVectElement() local
|
| H A D | AArch64InstrInfo.cpp | 1171 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & CmpMask,int64_t & CmpValue) const analyzeCompare() argument
1516 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
6622 Register SrcReg2; genFusedMultiply() local
6684 Register SrcReg2 = MAD->getOperand(3).getReg(); genFNegatedMAD() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 615 Register SrcReg2 = fuseCompareOperations() local
|
| H A D | SystemZInstrInfo.cpp | 534 Register &SrcReg2, int64_t &Mask, in analyzeCompare() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 854 unsigned SrcReg2 = 0; in PPCEmitCmp() local
1358 Register SrcReg2 = getRegForValue(I->getOperand(1)); SelectBinaryIntOp() local
[all...] |
| H A D | PPCInstrInfo.cpp | 2332 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & Mask,int64_t & Value) const analyzeCompare() argument
2362 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t Mask,int64_t Value,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
2751 Register SrcReg, SrcReg2; optimizeCmpPostRA() local
5341 Register SrcReg2 = MI->getOperand(2).getReg(); isSignOrZeroExtended() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1677 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & Mask,int64_t & Value) analyzeCompare() argument
1686 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t Mask,int64_t Value,const MachineRegisterInfo * MRI) optimizeCompareInstr() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1415 unsigned SrcReg2 = 0; in ARMEmitCmp() local
1763 Register SrcReg2 in SelectBinaryIntOp() local
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 2788 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & CmpMask,int64_t & CmpValue) const analyzeCompare() argument
2859 isRedundantFlagInstr(const MachineInstr * CmpI,Register SrcReg,Register SrcReg2,int64_t ImmValue,const MachineInstr * OI,bool & IsThumb1) isRedundantFlagInstr() argument
3014 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
3301 Register SrcReg, SrcReg2; shouldSink() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1408 Register SrcReg, SrcReg2; convertToThreeAddress() local
4661 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & CmpMask,int64_t & CmpValue) const analyzeCompare() argument
4737 isRedundantFlagInstr(const MachineInstr & FlagI,Register SrcReg,Register SrcReg2,int64_t ImmMask,int64_t ImmValue,const MachineInstr & OI,bool * IsSwapped,int64_t * ImmDelta) const isRedundantFlagInstr() argument
5099 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 671 Register SrcReg, SrcReg2; optimizeCmpInstr() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1880 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & Mask,int64_t & Value) const analyzeCompare() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 9584 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & CmpMask,int64_t & CmpValue) const analyzeCompare() argument
9643 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
|