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Searched defs:SrcR (Results 1 – 8 of 8) sorted by relevance

/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTfrCleanup.cpp204 unsigned SrcR = MI->getOperand(1).getReg(); rewriteIfImm() local
244 unsigned DefR, SrcR; eraseIfRedundant() local
H A DRDFCopy.cpp47 RegisterRef SrcR = DFG.makeRegRef(Src.getReg(), Src.getSubReg()); interpretAsCopy() local
H A DHexagonRDFOpt.cpp118 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in INITIALIZE_PASS_DEPENDENCY()
H A DHexagonGenInsert.cpp470 unsigned SrcR, InsR; member
486 unsigned SrcR = P.IFR.SrcR, InsR = P.IFR.InsR; in operator <<() local
674 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR, in isValidInsertForm() argument
864 for (unsigned SrcR in findRecordInsertForms() local
[all...]
H A DHexagonFrameLowering.cpp1725 Register SrcR = MI->getOperand(1).getReg(); expandCopy() local
1749 Register SrcR = MI->getOperand(2).getReg(); expandStoreInt() local
1812 Register SrcR = MI->getOperand(2).getReg(); expandStoreVecPred() local
1899 Register SrcR = MI->getOperand(2).getReg(); expandStoreVec2() local
1988 Register SrcR = MI->getOperand(2).getReg(); expandStoreVec() local
[all...]
H A DHexagonConstPropagation.cpp1942 RegisterSubReg SrcR(MI.getOperand(1)); in evaluate() local
H A DHexagonBitSimplify.cpp2246 unsigned SrcR = B0.RefI.Reg; in genBitSplit() local
/llvm-project/llvm/lib/Target/X86/
H A DX86FixupLEAs.cpp726 const MachineOperand &SrcR = SrcR1 == DstR ? Base : Index; in processInstructionForSlowLEA() local