Home
last modified time | relevance | path

Searched defs:SrcOp (Results 1 – 25 of 31) sorted by relevance

12

/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h129 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function
130 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function
131 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function
132 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function
138 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
139 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
H A DLegalizationArtifactCombiner.h599 unsigned SrcOp = SrcDef->getOpcode(); in tryCombineUnmergeValues() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp139 const MachineOperand &SrcOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
H A DHexagonExpandCondsets.cpp624 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, in genCondTfrFor()
H A DHexagonFrameLowering.cpp2455 MachineOperand &SrcOp = SI.getOperand(2); in optimizeSpillSlots() local
H A DHexagonBitSimplify.cpp2545 const MachineOperand &SrcOp = MI->getOperand(1); in simplifyExtractLow() local
H A DHexagonInstrInfo.cpp1122 const MachineOperand &SrcOp = MI.getOperand(2); in expandPostRAPseudo() local
/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp290 std::pair<unsigned,unsigned> SrcOp = (FirstIsDest ? RHSOp : LHSOp); in ParseConstraint() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1314 const MachineOperand &SrcOp = MI->getOperand(1); in verifyPreISelGenericInstruction() local
1336 const MachineOperand &SrcOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local
1680 const MachineOperand &SrcOp = MI->getOperand(1); in visitMachineInstrBefore() local
H A DMachineScheduler.cpp1825 const MachineOperand &SrcOp = Copy->getOperand(1); in constrainLocalCopy() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSILowerControlFlow.cpp518 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands() local
H A DAMDGPULegalizerInfo.cpp4024 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() local
4070 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local
4093 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local
4262 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in legalizeImageIntrinsic() local
H A DSIFoldOperands.cpp1791 auto &SrcOp = InstToErase->getOperand(1); in runOnMachineFunction() local
H A DSIInstrInfo.cpp1700 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local
1985 const MachineOperand &SrcOp = MI.getOperand(I); in expandMovDPP64() local
H A DAMDGPURegisterBankInfo.cpp3104 const MachineOperand &SrcOp = MI.getOperand(i); in getDefaultMappingSOP() local
H A DAMDGPUInstructionSelector.cpp1665 MachineOperand &SrcOp = MI.getOperand(ArgOffset + Intr->VAddrStart + I); in selectImageIntrinsic() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp1209 if (auto *SrcOp = dyn_cast<Instruction>(Src)) in visitZExt() local
1985 Value *SrcOp = CI.getPointerOperand(); in visitPtrToInt() local
H A DInstructionCombining.cpp2383 Value *SrcOp = BCI->getOperand(0); in visitGetElementPtrInst() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Linker/
H A DIRMover.cpp1252 MDNode *SrcOp = SrcModFlags->getOperand(I); in linkModuleFlagsMetadata() local
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-c-test/
H A Decho.cpp503 LLVMValueRef SrcOp = LLVMGetOperand(Src, 0); in CloneInstruction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1688 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT, in EmitStackConvert()
1693 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, EVT SlotVT, in EmitStackConvert()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6906 SDValue SrcOp = Op.getOperand(1); in computeKnownBitsForTargetNode() local
6925 SDValue SrcOp = Op.getOperand(0); in computeKnownBitsForTargetNode() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1873 MachineOperand &SrcOp = I.getOperand(0); in preISelLower() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DInstructionSimplify.cpp3397 Value *SrcOp = LI->getOperand(0); in SimplifyICmpInst() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp8346 static SDValue getVShift(bool isLeft, EVT VT, SDValue SrcOp, unsigned NumBits, in getVShift()
8358 static SDValue LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, const SDLoc &dl, in LowerAsSplatVectorLoad()
24723 SDValue SrcOp, uint64_t ShiftAmt, in getTargetVShiftByConstNode()
24806 SDValue SrcOp, SDValue ShAmt, in getTargetVShiftNode()
36586 SDValue SrcOp = Ops[i]; in combineX86ShufflesConstants() local
38861 SDValue SrcOp = Op.getOperand(i); in SimplifyDemandedVectorEltsForTargetNode() local
40573 SDValue SrcOp = SrcBC.getOperand(0); in combineExtractWithShuffle() local
40734 SDValue SrcOp = Ops[ExtractIdx / Mask.size()]; in combineExtractWithShuffle() local

12