| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 42 unsigned SrcIdx = 0; variable
|
| H A D | TwoAddressInstructionPass.cpp | 1127 unsigned SrcIdx, unsigned DstIdx, in tryInstructionTransform()
1322 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in collectTiedOperands() local
1371 unsigned SrcIdx = TP.first; in processTiedPairs() local
1593 unsigned SrcIdx = TiedPairs[0].first; in runOnMachineFunction() local
|
| H A D | TargetRegisterInfo.cpp | 391 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
|
| H A D | RegisterCoalescer.cpp | 1264 unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx(); in reMaterializeTrivialDef() local
1883 unsigned SrcIdx = CP.getSrcIdx(); in joinCopy() local
3508 unsigned SrcIdx = CP.getSrcIdx(); in joinVirtRegs() local
|
| H A D | PeepholeOptimizer.cpp | 1845 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 2014 unsigned SrcIdx = 1; in addConstantComments() local
2092 unsigned SrcIdx = 1; in addConstantComments() local
|
| H A D | X86InstrInfo.cpp | 2117 unsigned SrcIdx = (Imm >> 6) & 3; in commuteInstructionImpl() local
5423 unsigned SrcIdx = (Imm >> 6) & 3; in foldMemoryOperandCustom() local
|
| H A D | X86ISelLowering.cpp | 7418 unsigned SrcIdx = M / Size; in getTargetShuffleAndZeroables() local
7726 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); in getFauxShuffleMask() local
8063 uint64_t SrcIdx = Op.getConstantOperandVal(1); in getShuffleScalarElt() local
13115 int SrcIdx = i + Offset; in lowerShuffleAsSpecificZeroOrAnyExtend() local
37857 unsigned SrcIdx = (InsertPSMask >> 6) & 0x3; in combineTargetShuffle() local
43658 unsigned SrcIdx = Lane * NumSrcEltsPerLane + Elt % NumSrcEltsPerLane; in combineVectorPack() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 411 unsigned PredIdx, DOPIdx, SrcIdx, Src2Idx; in expand_DestructiveOp() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 292 int SrcIdx = getOperandIdx(MI.getOpcode(), OpTable[j][0]); in getSrcs() local
1378 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr &MI, unsigned SrcIdx, in getFlagOp()
|
| H A D | AMDGPUInstCombineIntrinsic.cpp | 988 for (unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) { in simplifyAMDGCNMemoryIntrinsicDemanded() local
|
| H A D | R600ISelLowering.cpp | 1980 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | InferAddressSpaces.cpp | 1123 int SrcIdx = U.getOperandNo(); in rewriteWithNewAddressSpaces() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2036 unsigned SrcIdx = MI.getNumOperands() - 1; in matchCombineUnmergeConstant() local
3727 for (unsigned SrcIdx = 1; SrcIdx < MI.getNumOperands(); SrcIdx += 2) { in applyExtendThroughPhis() local
3749 for (unsigned SrcIdx = 1; SrcIdx < MI.getNumOperands(); ++SrcIdx) { in applyExtendThroughPhis() local
|
| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGNonTrivialStruct.cpp | 33 enum { DstIdx = 0, SrcIdx = 1 }; enumerator
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 438 int SrcIdx = in visitExtractElementInst() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3346 for (int SrcIdx : SrcIndices) { in validateEarlyClobberLimitations() local
3790 auto SrcIdx = getNamedOperandIdx(Opcode, SrcName); in validateLdsDirect() local
5890 int SrcIdx = 0; in cvtExp() local
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 558 SmallVectorImpl<int> &SrcIdx) { in buildHvxVectorReg()
|