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Searched defs:SrcHi (Results 1 – 8 of 8) sorted by relevance

/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp56 Register DestLo, DestHi, SrcLo, SrcHi; copyPhysReg() local
H A DAVRISelLowering.cpp298 SDValue SrcHi = LowerShifts() local
/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp709 const MachineOperand &SrcLo = I->getOperand(1), &SrcHi = I->getOperand(2); in expandPseudoMTLoHi() local
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp925 Register SrcHi = HRI.getSubReg(SrcReg, Hexagon::vsub_hi); copyPhysReg() local
1142 Register SrcHi = HRI.getSubReg(SrcReg, Hexagon::vsub_hi); expandPostRAPseudo() local
1412 Register SrcHi = HRI.getSubReg(Op2.getReg(), Hexagon::vsub_hi); expandPostRAPseudo() local
1424 Register SrcHi = HRI.getSubReg(Op3.getReg(), Hexagon::vsub_hi); expandPostRAPseudo() local
[all...]
H A DHexagonFrameLowering.cpp1901 Register SrcHi = HRI.getSubReg(SrcR, Hexagon::vsub_hi); expandStoreVec2() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp2962 SDValue SrcLo, SrcHi; SplitVecRes_FP_TO_XINT_SAT() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp8708 SDValue SrcHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, SrcVec, LowerINTRINSIC_WO_CHAIN() local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4774 SDValue SrcHi = DAG.getNode(ISD::AND, DL, MVT::i64, SrcVal, LowerINT_TO_FP() local
[all...]