/netbsd-src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 109 GenericValue Src2, Type *Ty) { in executeFAddInst() 120 GenericValue Src2, Type *Ty) { in executeFSubInst() 131 GenericValue Src2, Type *Ty) { in executeFMulInst() 142 GenericValue Src2, Type *Ty) { in executeFDivInst() 153 GenericValue Src2, Type *Ty) { in executeFRemInst() 192 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ() 206 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE() 220 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT() 234 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT() 248 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUMacroFusion.cpp | 46 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent() local
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H A D | SIOptimizeExecMasking.cpp | 108 const MachineOperand &Src2 = MI.getOperand(2); in isLogicalOpOnExec() local 124 const MachineOperand &Src2 = MI.getOperand(2); in isLogicalOpOnExec() local
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H A D | SIShrinkInstructions.cpp | 757 const MachineOperand *Src2 = in runOnMachineFunction() local 775 const MachineOperand *Src2 = TII->getNamedOperand(MI, in runOnMachineFunction() local
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H A D | AMDGPUInstCombineIntrinsic.cpp | 44 const APFloat &Src2) { in fmed3AMDGCN() 496 Value *Src2 = II.getArgOperand(2); in instCombineIntrinsic() local
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H A D | SIPeepholeSDWA.cpp | 621 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in matchSDWAOperand() local 1047 MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in convertToSDWA() local
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H A D | GCNDPPCombine.cpp | 271 if (auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2)) { in createDPPInst() local
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H A D | SIInstrInfo.cpp | 2783 MachineOperand *Src2 = getNamedOperand(UseMI, AMDGPU::OpName::src2); in FoldImmediate() local 3091 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2); in convertToThreeAddress() local 3494 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2); in canShrink() local 3590 const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2); in buildShrunkInst() local 4064 const MachineOperand &Src2 = MI.getOperand(Src2Idx); in verifyInstruction() local 4849 MachineOperand &Src2 = MI.getOperand(VOP3Idx[2]); in legalizeOperandsVOP3() local
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H A D | AMDGPUISelDAGToDAG.cpp | 2321 SDValue Src2 = N->getOperand(2); in SelectFMAD_FMA() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 156 MachineOperand &Src2 = MI.getOperand(2); in runOnMachineFunction() local 173 MachineOperand &Src2 = MI.getOperand(2); in runOnMachineFunction() local
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H A D | HexagonGenMux.cpp | 305 MachineOperand *Src1 = &Def1.getOperand(2), *Src2 = &Def2.getOperand(2); in genMuxInBlock() local
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H A D | HexagonConstPropagation.cpp | 2583 const MachineOperand &Src2 = MI.getOperand(2); in evaluateHexCompare() local 2605 const MachineOperand &Src1, const MachineOperand &Src2, in evaluateHexCompare2() 2640 const MachineOperand &Src2 = MI.getOperand(2); in evaluateHexLogical() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 147 SDValue Src1, SDValue Src2, uint64_t Size) { in emitCLC() 182 SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, in EmitTargetCodeForMemcmp() 233 SDValue Src2, MachinePointerInfo Op1PtrInfo, in EmitTargetCodeForStrcmp()
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H A D | SystemZISelLowering.cpp | 3908 SDValue Src2 = Node->getVal(); in lowerATOMIC_LOAD_OP() local 3975 SDValue Src2 = Node->getVal(); in lowerATOMIC_LOAD_SUB() local 7363 MachineOperand Src2 = earlyUseOperand(MI.getOperand(3)); in emitAtomicLoadBinary() local 7481 Register Src2 = MI.getOperand(3).getReg(); in emitAtomicLoadMinMax() local
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/netbsd-src/sys/external/bsd/gnu-efi/dist/lib/ |
H A D | dpath.c | 129 IN EFI_DEVICE_PATH *Src2 in AppendDevicePath() 202 IN EFI_DEVICE_PATH *Src2 in AppendDevicePathNode()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcAsmPrinter.cpp | 126 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 54 Register Src2 = MI.getOperand(2).getReg(); in matchExtractVecEltPairwiseAdd() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEAsmPrinter.cpp | 152 MCOperand &Src2, MCOperand &RD, in emitBinary()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 442 SDValue Src2 = Node->getOperand(2); in Select() local 511 SDValue Src2 = Node->getOperand(3); in Select() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 673 const SrcOp &Src2, in buildShuffleVector()
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/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 481 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); in emitTernaryMaybeConstrainedFPBuiltin() local 540 llvm::Value *Src2 = CGF.EmitScalarExpr(E->getArg(2)); in emitTernaryBuiltin() local 15557 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); in EmitAMDGPUBuiltinExpr() local 15651 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); in EmitAMDGPUBuiltinExpr() local 15662 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); in EmitAMDGPUBuiltinExpr() local 15701 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); in EmitAMDGPUBuiltinExpr() local 15762 llvm::Value *Src2 = EmitScalarExpr(E->getArg(2)); in EmitAMDGPUBuiltinExpr() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1835 SDValue Src2 = ShuffleSrc2 ? ShuffleSrc2 : DAG.getUNDEF(VecT); in LowerBUILD_VECTOR() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1319 Register Src2 = MI.getOperand(2).getReg(); in convertToThreeAddressWithLEA() local 1535 const MachineOperand &Src2 = MI.getOperand(2); in convertToThreeAddress() local
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H A D | X86ISelLowering.cpp | 23758 SDValue Src1, Src2; in LowerSELECT() local 25108 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25145 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25226 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25268 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25287 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25304 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25323 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25341 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local 25359 SDValue Src2 = Op.getOperand(2); in LowerINTRINSIC_WO_CHAIN() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 3846 unsigned Src2 = Inst.getOperand(Inst.getNumOperands() - in validateInstruction() local
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