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Searched defs:Src1 (Results 1 – 25 of 48) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp108 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst()
119 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst()
130 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst()
141 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst()
152 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst()
192 static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, in executeICMP_EQ()
206 static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, in executeICMP_NE()
220 static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, in executeICMP_ULT()
234 static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, in executeICMP_SLT()
248 static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, in executeICMP_UGT()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMasking.cpp105 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local
121 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local
429 MachineOperand &Src1 = SaveExecInst->getOperand(2); in runOnMachineFunction() local
H A DAMDGPUInstCombineIntrinsic.cpp43 static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1, in fmed3AMDGCN()
279 Value *Src1 = II.getArgOperand(1); in instCombineIntrinsic() local
364 Value *Src1 = II.getArgOperand(1); in instCombineIntrinsic() local
393 Value *Src1 = II.getArgOperand(1); in instCombineIntrinsic() local
495 Value *Src1 = II.getArgOperand(1); in instCombineIntrinsic() local
568 Value *Src1 = II.getArgOperand(1); in instCombineIntrinsic() local
H A DR600ExpandSpecialInstrs.cpp149 Register Src1 = in runOnMachineFunction() local
200 unsigned Src1 = 0; in runOnMachineFunction() local
H A DSIPeepholeSDWA.cpp545 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
582 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
616 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
662 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in matchSDWAOperand() local
970 if (MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1)) { in isConvertibleToSDWA() local
1030 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA() local
H A DGCNDPPCombine.cpp261 if (auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) { in createDPPInst() local
352 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst() local
541 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in combineDPPMov() local
H A DSIShrinkInstructions.cpp182 const MachineOperand &Src1 = MI.getOperand(1); in shrinkScalarCompare() local
316 MachineOperand *Src1 = &MI.getOperand(2); in shrinkScalarLogicOp() local
651 MachineOperand *Src1 = &MI.getOperand(2); in runOnMachineFunction() local
H A DSIFoldOperands.cpp1069 MachineOperand *Src1 = getImmOrMaterializedImm(MRI, MI->getOperand(Src1Idx)); in tryConstantFoldOp() local
1159 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in tryFoldCndMask() local
1318 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp() local
1434 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
1465 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
H A DSIInstrInfo.cpp2022 MachineOperand &Src1, in swapSourceModifiers()
2086 MachineOperand &Src1 = MI.getOperand(Src1Idx); in commuteInstructionImpl() local
2782 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1); in FoldImmediate() local
3088 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in convertToThreeAddress() local
3509 const MachineOperand *Src1 in canShrink() local
3531 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() local
3586 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); in buildShrunkInst() local
4063 const MachineOperand &Src1 = MI.getOperand(Src1Idx); in verifyInstruction() local
4085 const MachineOperand &Src1 = MI.getOperand(Src1Idx); in verifyInstruction() local
4732 MachineOperand &Src1 = MI.getOperand(Src1Idx); in legalizeOperandsVOP2() local
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H A DSILoadStoreOptimizer.cpp1462 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeTBufferStorePair() local
1617 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeBufferStorePair() local
1791 const auto *Src1 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src1); in processBaseWithConstOffset() local
H A DSIISelLowering.cpp3891 MachineOperand &Src1 = MI.getOperand(3); in EmitInstrWithCustomInserter() local
3915 MachineOperand &Src1 = MI.getOperand(2); in EmitInstrWithCustomInserter() local
3963 MachineOperand &Src1 = MI.getOperand(2); in EmitInstrWithCustomInserter() local
4026 MachineOperand &Src1 = MI.getOperand(3); in EmitInstrWithCustomInserter() local
4127 Register Src1 = MI.getOperand(2).getReg(); in EmitInstrWithCustomInserter() local
4721 SDValue Src1 = N->getOperand(2); in lowerFCMPIntrinsic() local
4797 SDValue Src1 = N->getOperand(2); in ReplaceNodeResults() local
4809 SDValue Src1 = N->getOperand(2); in ReplaceNodeResults() local
7544 SDValue Src1 = Op.getOperand(5); in LowerINTRINSIC_VOID() local
8350 SDValue Src1 = Op.getOperand(1); in LowerFDIV16() local
[all …]
H A DSIFixSGPRCopies.cpp721 MachineOperand &Src1 = MI.getOperand(Src1Idx); in runOnMachineFunction() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp155 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
172 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
H A DHexagonGenMux.cpp208 unsigned HexagonGenMux::getMuxOpcode(const MachineOperand &Src1, in getMuxOpcode()
305 MachineOperand *Src1 = &Def1.getOperand(2), *Src2 = &Def2.getOperand(2); in genMuxInBlock() local
H A DHexagonConstPropagation.cpp2582 const MachineOperand &Src1 = MI.getOperand(1); in evaluateHexCompare() local
2605 const MachineOperand &Src1, const MachineOperand &Src2, in evaluateHexCompare2()
2639 const MachineOperand &Src1 = MI.getOperand(1); in evaluateHexLogical() local
3033 const MachineOperand &Src1 = MI.getOperand(1); in rewriteHexConstUses() local
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h1514 const SrcOp &Src1) { in buildAnd()
1536 const SrcOp &Src1) { in buildXor()
1670 const SrcOp &Src1) { in buildFCopysign()
1696 const SrcOp &Src1) { in buildSMin()
1702 const SrcOp &Src1) { in buildSMax()
1708 const SrcOp &Src1) { in buildUMin()
1714 const SrcOp &Src1) { in buildUMax()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp147 SDValue Src1, SDValue Src2, uint64_t Size) { in emitCLC()
181 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp()
232 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForStrcmp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp98 void GISelKnownBits::computeKnownBitsMin(Register Src0, Register Src1, in computeKnownBitsMin()
508 unsigned GISelKnownBits::computeNumSignBitsMin(Register Src0, Register Src1, in computeNumSignBitsMin()
H A DCSEMIRBuilder.cpp200 const SrcOp &Src1 = SrcOps[1]; in buildInstr() local
H A DLegalizerHelper.cpp1347 Register Src1 = MI.getOperand(1).getReg(); in widenScalarMergeValues() local
4779 Register Src1 = MI.getOperand(NumDefs).getReg(); in narrowScalarAddSub() local
4821 Register Src1 = MI.getOperand(1).getReg(); in narrowScalarMul() local
5962 Register Src1 = MI.getOperand(2).getReg(); in lowerFPOWI() local
5989 Register Src1 = MI.getOperand(2).getReg(); in lowerMinMax() local
6005 Register Src1 = MI.getOperand(2).getReg(); in lowerFCopySign() local
6052 Register Src1 = MI.getOperand(2).getReg(); in lowerFMinNumMaxNum() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp299 unsigned Src1 = 0, SubReg1; in transformInstruction() local
/netbsd-src/sys/external/bsd/gnu-efi/dist/lib/
H A Ddpath.c128 IN EFI_DEVICE_PATH *Src1, in AppendDevicePath()
201 IN EFI_DEVICE_PATH *Src1, in AppendDevicePathNode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DInferAddressSpaces.cpp657 Constant *Src1 = CE->getOperand(2); in cloneConstantExprWithNewAddressSpace() local
843 Value *Src1 = Op.getOperand(2); in updateAddressSpace() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp53 Register Src1 = MI.getOperand(1).getReg(); in matchExtractVecEltPairwiseAdd() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp441 SDValue Src1 = Node->getOperand(1); in Select() local
510 SDValue Src1 = Node->getOperand(2); in Select() local

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