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Searched defs:Src0SubRC (Results 1 – 2 of 2) sorted by relevance

/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp7785 const TargetRegisterClass *Src0SubRC = splitScalar64BitUnaryOp() local
7847 const TargetRegisterClass *Src0SubRC = splitScalarSMulU64() local
7956 const TargetRegisterClass *Src0SubRC = splitScalarSMulPseudo() local
8019 const TargetRegisterClass *Src0SubRC = splitScalar64BitBinaryOp() local
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H A DSIISelLowering.cpp5066 const TargetRegisterClass *Src0SubRC = EmitInstrWithCustomInserter() local
5293 const TargetRegisterClass *Src0SubRC = EmitInstrWithCustomInserter() local