| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptimizeSZextends.cpp | 116 Instruction *Shl = dyn_cast<Instruction>(Ashr->getOperand(0)); in runOnFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 176 Constant *Shl = ConstantExpr::getShl(C1, C2); in visitMul() local
190 BinaryOperator *Shl = BinaryOperator::CreateShl(NewOp, NewCst); in visitMul() local
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| H A D | InstCombineSimplifyDemanded.cpp | 1006 Instruction *Shr, const APInt &ShrOp1, Instruction *Shl, in simplifyShrShlDemandedBits()
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| H A D | InstCombineAddSub.cpp | 1319 auto *Shl = BinaryOperator::CreateShl(LHS, ConstantInt::get(Ty, 1)); in visitAdd() local
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| H A D | InstCombineCompares.cpp | 1985 static Instruction *foldICmpShlOne(ICmpInst &Cmp, Instruction *Shl, in foldICmpShlOne()
2048 BinaryOperator *Shl, in foldICmpShlConstant()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 451 Value *Shl = IC.Builder.CreateShl(Src, IntSize - Offset - Width); in instCombineIntrinsic() local
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| H A D | AMDGPUISelLowering.cpp | 2826 uint32_t Shl = static_cast<uint32_t>(Src0) << (32 - Offset - Width); in constantFoldBFE() local
3088 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine() local
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| H A D | AMDGPUISelDAGToDAG.cpp | 2139 const SDValue &Shl = N->getOperand(0); in SelectS_BFEFromShifts() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 501 Shl, ///< Shift left. enumerator
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| /netbsd-src/external/apache2/llvm/dist/llvm/bindings/ocaml/llvm/ |
| H A D | llvm.ml | 202 | Shl Constructor
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| H A D | llvm.mli | 226 | Shl (** Logical Operators *) Constructor
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| /netbsd-src/external/gpl3/gcc/dist/gcc/d/dmd/ |
| H A D | constfold.d | 602 UnionExp Shl(const ref Loc loc, Type type, Expression e1, Expression e2) in Shl() function
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/d/dmd/ |
| H A D | constfold.c | 637 UnionExp Shl(Loc loc, Type *type, Expression *e1, Expression *e2) in Shl() function
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/AST/Interp/ |
| H A D | Interp.h | 911 inline bool Shl(InterpState &S, CodePtr OpPC) { in Shl() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 1316 SDValue Shl = N->getOperand(0); in MatchSLLIUW() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 1072 static BinaryOperator *ConvertShiftToMul(Instruction *Shl) { in ConvertShiftToMul()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1857 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, And, ShlCount); in foldMaskAndShiftToExtract() local
2412 SDValue Shl = N.getOperand(0); in matchAddressRecursively() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1374 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt); in widenScalarMergeValues() local
5811 auto Shl = MIRBuilder.buildShl(DstTy, R, SubExponent); in lowerFPTOSI() local
6171 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt); in lowerMergeValues() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9459 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2, in lowerToVINSERTB() local
9567 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2, in lowerToVINSERTH() local
9774 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv2, Conv2, in LowerVECTOR_SHUFFLE() local
9808 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2, in LowerVECTOR_SHUFFLE() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyLibCalls.cpp | 931 Value *Shl = B.CreateShl(B.getIntN(Width, 1ULL), C); in optimizeMemChr() local
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| H A D | SimplifyCFG.cpp | 6230 auto *Shl = Builder.CreateShl(Sub, Ty->getBitWidth() - Shift); in ReduceSwitchRange() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1698 auto Shl = MIB.buildInstr(Opc, {DstReg}, {Src1Reg}); in selectVectorSHL() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 898 SDValue Shl = And1.getOperand(0); in performORCombine() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/bindings/go/llvm/ |
| H A D | ir.go | 155 Shl Opcode = C.LLVMShl const
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 3865 SDValue Shl = in visitMUL() local
8410 SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1); in visitSHL() local
8634 SDValue Shl = N0.getOperand(0); in visitSRA() local
22337 SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N0), VT, AndLHS, ShlAmt); in SimplifySelectCC() local
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