/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | DemandedBits.cpp | 162 uint64_t ShiftAmt = SA->urem(BitWidth); in determineLiveOperandBits() local 210 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local 227 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local 241 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
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H A D | ConstantFolding.cpp | 221 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); in FoldBitCast() local 269 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); in FoldBitCast() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 540 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local 591 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local 632 uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local 815 uint64_t ShiftAmt = SA->urem(BitWidth); in SimplifyDemandedUseBits() local
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H A D | InstCombineCasts.cpp | 1129 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local 1366 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local 1380 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/ |
H A D | KnownBits.cpp | 201 for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(), in shl() local 254 for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(), in lshr() local 312 for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(), in ashr() local
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H A D | APInt.cpp | 990 void APInt::ashrSlowCase(unsigned ShiftAmt) { in ashrSlowCase() 1039 void APInt::lshrSlowCase(unsigned ShiftAmt) { in lshrSlowCase() 1051 void APInt::shlSlowCase(unsigned ShiftAmt) { in shlSlowCase() 2259 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
H A D | VNCoercion.cpp | 131 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy).getFixedSize() - in coerceAvailableValueToLoadTypeHelper() local 449 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionOptimizer.cpp | 175 unsigned ShiftAmt = AArch64_AM::getShiftValue(I.getOperand(3).getImm()); in findSuitableCompare() local
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H A D | AArch64ExpandImm.cpp | 70 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
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H A D | AArch64ISelDAGToDAG.cpp | 406 unsigned ShiftAmt; in SelectArithImmed() local 2212 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local 2220 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local 2781 SDValue ShiftAmt = N->getOperand(1); in tryShiftAmountMod() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 300 auto ShiftAmt = in buildLCMMergePieces() local 1373 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in widenScalarMergeValues() local 1536 auto ShiftAmt = MIRBuilder.buildConstant(SrcTy, DstSize * I); in widenScalarUnmergeValues() local 1993 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits); in widenScalar() local 2770 auto ShiftAmt = MIRBuilder.buildConstant(AnyExtTy, LargeSplitSize); in lowerLoad() local 2834 auto ShiftAmt = MIRBuilder.buildConstant(ExtendTy, LargeSplitSize); in lowerStore() local 2976 auto ShiftAmt = MIRBuilder.buildConstant(Ty, Ty.getSizeInBits() - 1); in lower() local 3202 auto ShiftAmt = in lower() local 4523 auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1); in narrowScalarShift() local 6024 auto ShiftAmt = MIRBuilder.buildConstant(Src0Ty, Src0Size - Src1Size); in lowerFCopySign() local [all …]
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H A D | CombinerHelper.cpp | 1952 int64_t ShiftAmt = MaybeShiftAmtVal->Value.getSExtValue(); in matchCombineShlOfExtend() local 1967 auto ShiftAmt = Builder.buildConstant(ExtSrcTy, ShiftAmtVal); in applyCombineShlOfExtend() local 2049 unsigned ShiftAmt = Dst0Ty.getSizeInBits(); in matchCombineUnmergeConstant() local 2271 unsigned ShiftAmt; in tryCombineShiftToUnmerge() local 2534 Register ShiftAmt; in matchCombineTruncOfShl() local 2560 Register ShiftAmt = MatchInfo.second; in applyCombineTruncOfShl() local 2991 int64_t ShiftAmt; in applyAshShlToSextInreg() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUPostLegalizerCombiner.cpp | 212 int64_t ShiftAmt; in matchCvtF32UByteN() local
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H A D | R600ISelLowering.cpp | 1098 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateTruncStore() local 1327 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateExtLoad() local
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H A D | AMDGPURegisterBankInfo.cpp | 1888 auto ShiftAmt = B.buildConstant(LLT::scalar(32), 31); in extendLow32IntoHigh32() local 2551 auto ShiftAmt = B.buildConstant(S32, 16); in applyMappingImpl() local 2560 auto ShiftAmt = B.buildConstant(S32, 16); in applyMappingImpl() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 170 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
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H A D | AArch64PostLegalizerLowering.cpp | 779 uint64_t ShiftAmt = MaybeShiftAmt->Value.getZExtValue(); in getCmpOperandFoldingProfit() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1913 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask() local 1980 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale() local 2077 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToBEXTR() local 3459 unsigned Bitwidth) { in matchBitExtract() 3600 SDValue ShiftAmt = X.getOperand(1); in matchBitExtract() local 3834 SDValue ShiftAmt = OrigShiftAmt; in tryShiftAmountMod() local
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H A D | X86InstCombineIntrinsic.cpp | 286 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth)); in simplifyX86immShift() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 1611 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize * (Ratio - 1); in executeBitCastInst() local 1627 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize * (Ratio - 1); in executeBitCastInst() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 3449 uint64_t ShiftAmt = ShiftCnst->getZExtValue(); in tryBFE() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 1819 SDValue ShiftAmt = in SimplifyDemandedBits() local 3290 SDValue ShiftAmt = DAG.getConstant(MaskedBits, DL, XVT); in optimizeSetCCOfSignedTruncationCheck() local 8388 SDValue ShiftAmt = DAG.getConstant(C.logBase2(), dl, ShiftAmtTy); in expandMULO() local 8420 SDValue ShiftAmt = DAG.getConstant(VT.getScalarSizeInBits(), dl, in expandMULO() local 8495 SDValue ShiftAmt = DAG.getConstant( in expandMULO() local
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H A D | DAGCombiner.cpp | 3282 ConstantSDNode *ShiftAmt = isConstOrConstSplat(N1.getOperand(1)); in visitSUB() local 5562 const APInt &ShiftAmt = Srl.getConstantOperandAPInt(1); in combineShiftAnd1ToBitTest() local 7862 uint64_t ShiftAmt = ShiftC->getLimitedValue(); in visitXOR() local 8493 unsigned ShiftAmt = ShiftAmtSrc->getZExtValue(); in combineShiftToMULH() local 8604 int ShiftAmt = N1C->getZExtValue() - N01C->getZExtValue(); in visitSRA() local 8638 unsigned ShiftAmt = N1C->getZExtValue(); in visitSRA() local 8824 uint64_t ShiftAmt = N1C->getZExtValue(); in visitSRL() local 11633 uint64_t ShiftAmt = N01->getZExtValue(); in ReduceLoadWidth() local 18996 uint64_t ShiftAmt = In.getNode()->getConstantOperandVal(1); in reduceBuildVecTruncToBitCast() local 22155 SDValue ShiftAmt = DAG.getConstant(ShCt, DL, ShiftAmtTy); in foldSelectCCToShiftAnd() local [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 1476 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local 1492 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local 5088 SDValue ShiftAmt = in Select() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 1831 unsigned ShiftAmt; in emitIntSExt32r1() local
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