/freebsd-src/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | DivisionByConstantInfo.h | 24 unsigned ShiftAmount; ///< shift amount member
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRShiftExpand.cpp | 94 Value *ShiftAmount = Builder.CreateTrunc(BI->getOperand(1), Int8Ty); in expand() local
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H A D | AVRISelLowering.cpp | 301 uint64_t ShiftAmount = N->getConstantOperandVal(1); LowerShifts() local 369 uint64_t ShiftAmount = N->getConstantOperandVal(1); LowerShifts() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
H A D | SPIRVBaseInfo.h | 255 for (unsigned ShiftAmount = 0; ShiftAmount < 32; ShiftAmount += 8) { getSPIRVStringOperand() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMatInt.cpp | 108 int ShiftAmount = 0; generateInstSeqImpl() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVRegisterInfo.cpp | 323 uint32_t ShiftAmount = Log2_32(LMUL); lowerVSPILL() local 400 uint32_t ShiftAmount = Log2_32(LMUL); lowerVRELOAD() local
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H A D | RISCVInstrInfo.cpp | 3075 uint32_t ShiftAmount = Log2_32(NumOfVReg); getVLENFactoredAmount() local 3088 uint32_t ShiftAmount; getVLENFactoredAmount() local 3112 uint32_t ShiftAmount = Log2_32(NumOfVReg - 1); getVLENFactoredAmount() local 3123 uint32_t ShiftAmount = Log2_32(NumOfVReg + 1); getVLENFactoredAmount() local 3146 for (uint32_t ShiftAmount = 0; NumOfVReg >> ShiftAmount; ShiftAmount++) { getVLENFactoredAmount() local [all...] |
H A D | RISCVFrameLowering.cpp | 673 unsigned ShiftAmount = Log2(MaxAlignment); emitPrologue() local
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/freebsd-src/contrib/llvm-project/clang/lib/AST/Interp/ |
H A D | IntegralAP.h | 259 unsigned ShiftAmount = B.V.getZExtValue(); shiftRight() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYFrameLowering.cpp | 177 unsigned ShiftAmount = Log2(MaxAlignment); in emitPrologue() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 283 unsigned ShiftAmount = 0) const { in selectAddrFrameIndexOffset() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 433 unsigned ShiftAmount; global() member 2237 CreateReg(unsigned RegNum,RegKind Kind,SMLoc S,SMLoc E,MCContext & Ctx,RegConstraintEqualityTy EqTy=RegConstraintEqualityTy::EqualsReg,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateReg() argument 2256 CreateVectorReg(unsigned RegNum,RegKind Kind,unsigned ElementWidth,SMLoc S,SMLoc E,MCContext & Ctx,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateVectorReg() argument 2342 CreateShiftedImm(const MCExpr * Val,unsigned ShiftAmount,SMLoc S,SMLoc E,MCContext & Ctx) CreateShiftedImm() argument 3374 int64_t ShiftAmount = getTok().getIntVal(); tryParseImmWithOptionalShift() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 6533 shiftAmountKnownInRange(const Value * ShiftAmount) shiftAmountKnownInRange() argument 8580 unsigned ShiftAmount = Width - 1; setLimitsForBinOp() local 8601 unsigned ShiftAmount = Width - 1; setLimitsForBinOp() local 8618 unsigned ShiftAmount = C->countl_one() - 1; setLimitsForBinOp() local 8623 unsigned ShiftAmount = C->countl_zero() - 1; setLimitsForBinOp() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2292 unsigned ShiftAmount = NLZ > NTZ ? NLZ - NTZ : NTZ - NLZ; SimplifyDemandedBits() local 7482 unsigned ShiftAmount = OuterBitSize - InnerBitSize; expandMUL_LOHI() local 9333 SDValue ShiftAmount = scalarizeVectorLoad() local 9418 SDValue ShiftAmount = scalarizeVectorStore() local 9595 SDValue ShiftAmount = expandUnalignedLoad() local 9709 SDValue ShiftAmount = DAG.getConstant( expandUnalignedStore() local [all...] |
H A D | LegalizeVectorOps.cpp | 1276 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); ExpandSIGN_EXTEND_VECTOR_INREG() local
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H A D | LegalizeIntegerTypes.cpp | 999 SDValue ShiftAmount = PromoteIntRes_ADDSUBSHLSAT() local 4178 SDValue ShiftAmount = DAG.getShiftAmountConstant(Scale % NVTSize, NVT, dl); ExpandIntRes_MULFIX() local
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H A D | LegalizeDAG.cpp | 1655 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; ExpandFCOPYSIGN() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 968 uint64_t ShiftAmount = N->getConstantOperandVal(1); LowerShifts() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsTargetStreamer.cpp | 274 int16_t ShiftAmount, SMLoc IDLoc, in emitDSLL() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 1909 uint64_t ShiftAmount = V.getConstantOperandVal(1); factorOutPowerOf2() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 411 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0; foldVecTruncToExtElt() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 5190 const MCExpr *ShiftAmount; parsePKHImm() local 5255 const MCExpr *ShiftAmount; parseShifterImm() local 5304 const MCExpr *ShiftAmount; parseRotImm() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 2878 unsigned ShiftAmount = BitWidth - 16; in loadImmediate() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 14182 SDValue ShiftAmount = getVectorBitwiseReduce() local 14686 uint64_t ShiftAmount = Base.getOperand(1).getConstantOperandVal(1); shouldReduceLoadWidth() local 19605 int64_t ShiftAmount; tryCombineShiftImm() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 6022 std::optional<ValueAndVReg> ShiftAmount; matchBuildVectorIdentityFold() local
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