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Searched defs:Shift1 (Results 1 – 7 of 7) sorted by relevance

/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp730 uint64_t Shift1 = 0, Shift2 = 0; foldLoadsRecursive() local
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp13909 SDValue Shift1 = expandMul() local
13942 SDValue Shift1 = expandMul() local
13954 SDValue Shift1 = expandMul() local
13970 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), expandMul() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp737 bool Shift1 = mi_match( selectG_BUILD_VECTOR() local
/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp2057 const APInt *Shift1, *Shift2; simplifyAndCommutative() local
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp1948 Register Shift1 = applyShiftOfShiftedLogic() local
/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp29581 SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, LowerShift() local
47605 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), combineMulSpecial() local
47938 SDValue Shift1 = combineMul() local
[all...]
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7616 SDValue Shift1 = N1.getOperand(0); matchBSwapHWordOrAndAnd() local
[all...]