Searched defs:Shift1 (Results 1 – 6 of 6) sorted by relevance
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 732 uint64_t Shift1 = 0, Shift2 = 0; foldLoadsRecursive() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.cpp | 743 bool Shift1 = mi_match( selectG_BUILD_VECTOR() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 2044 const APInt *Shift1, *Shift2; simplifyAndCommutative() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 1795 Register Shift1 = applyShiftOfShiftedLogic() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 29269 SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, LowerShift() local 46580 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), combineMulSpecial() local 46918 SDValue Shift1 = combineMul() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7612 SDValue Shift1 = N1.getOperand(0); matchBSwapHWordOrAndAnd() local [all...] |