| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDKernelCodeTInfo.h | 38 #define PRINTCOMP(GetMacro, Shift) \ argument
43 #define PARSECOMP(SetMacro, Shift) \ argument
53 #define COMPPGM(name, aname, GetMacro, SetMacro, Shift) \ argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/ |
| H A D | ScaledNumber.cpp | 48 int Shift = 64 - LeadingZeros; in multiply64() local
64 int Shift = 0; in divide32() local
86 int Shift = 0; in divide64() local
169 int Shift = 63 - (NewE - E); in toStringAPFloat() local
214 if (int Shift = std::min(int16_t(countLeadingZeros64(D)), E)) { in toString() local
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| H A D | KnownBits.cpp | 173 unsigned Shift = RHS.getConstant().getZExtValue(); in shl() local
226 unsigned Shift = RHS.getConstant().getZExtValue(); in lshr() local
279 unsigned Shift = RHS.getConstant().getZExtValue(); in ashr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| H A D | LEB128.h | 133 unsigned Shift = 0; variable
166 unsigned Shift = 0; variable
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| H A D | ScaledNumber.h | 88 int Shift = 64 - Width - countLeadingZeros(Digits); variable
700 static ScaledNumber adjustToWidth(uint64_t N, int32_t Shift) { in adjustToWidth()
833 template <class DigitsT> void ScaledNumber<DigitsT>::shiftLeft(int32_t Shift) { in shiftLeft()
863 template <class DigitsT> void ScaledNumber<DigitsT>::shiftRight(int32_t Shift) { in shiftRight()
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| H A D | MathExtras.h | 99 T Shift = std::numeric_limits<T>::digits >> 1; in count() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandImm.cpp | 269 unsigned Shift = 0; // LSL amount for high bits with MOVZ/MOVN in expandMOVImmSimple() local
312 for (unsigned Shift = 0; Shift < BitSize; Shift += 16) { in expandMOVImm() local
355 for (unsigned Shift = 0; Shift < BitSize; Shift += 16) { in expandMOVImm() local
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| H A D | AArch64RedundantCopyElimination.cpp | 198 int32_t Shift = PredI.getOperand(3).getImm(); in knownRegValInBlock() local
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| H A D | AArch64ISelDAGToDAG.cpp | 74 bool SelectArithShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectArithShiftedRegister()
77 bool SelectLogicalShiftedRegister(SDValue N, SDValue &Reg, SDValue &Shift) { in SelectLogicalShiftedRegister()
185 bool SelectSVEAddSubImm(SDValue N, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubImm()
396 SDValue &Shift) { in SelectArithImmed()
426 SDValue &Shift) { in SelectNegArithImmed()
527 SDValue &Reg, SDValue &Shift) { in SelectShiftedRegister()
766 SDValue &Shift) { in SelectArithExtendedRegister()
2513 for (unsigned Shift = 0; Shift < BitWidth; Shift += 16) { in tryBitfieldInsertOpFromOrAndImm() local
3101 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, SDValue &Shift) { in SelectSVEAddSubImm()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/ADT/ |
| H A D | PointerEmbeddedInt.h | 44 Shift = sizeof(uintptr_t) * CHAR_BIT - Bits, enumerator
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | OperatorPrecedence.h | 39 Shift = 12, // <<, >> enumerator
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeBeadsGen.cpp | 103 unsigned Shift = i % 8; in run() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 601 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI); in getExprOpValue() local
642 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI); in getExprOpValue() local
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Tooling/ASTDiff/ |
| H A D | ASTDiff.h | 39 int Depth, Height, Shift = 0; member
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Format/ |
| H A D | WhitespaceManager.cpp | 268 int Shift = 0; in AlignTokenSequence() local
554 int Shift = 0; in AlignMacroSequence() local
894 int Shift = 0; in alignTrailingComments() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 58 uint8_t Shift; // Shift value member
105 uint8_t Shift() const { return Imm.Shift; } in Shift() function
327 static bool InRange(int64_t Value, unsigned short Shift, int LBound, in InRange()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 36 ConstantInt *Shift; in generateSignedRemainderCode() local
108 ConstantInt *Shift; in generateSignedDivisionCode() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 810 for (int Shift = 0; Shift <= RegWidth - 16; Shift += 16) in isAnyMOVZMovAlias() local
817 inline static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth) { in isMOVZMovAlias()
828 inline static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth) { in isMOVNMovAlias()
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| H A D | AArch64InstPrinter.cpp | 239 int Shift = MI->getOperand(2).getImm(); in printInst() local
253 int Shift = MI->getOperand(2).getImm(); in printInst() local
954 unsigned Shift = in printAddSubImm() local
1574 unsigned Shift = MI->getOperand(OpNum + 1).getImm(); in printImm8OptLsl() local
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| /netbsd-src/external/bsd/libarchive/dist/libarchive/ |
| H A D | archive_ppmd_private.h | 108 Byte Shift; /* Speed of Freq change; low Shift is for fast change */ member
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombinePHI.cpp | 994 unsigned Shift; // The amount shifted. member
1012 unsigned Shift; // The amount shifted. member
1115 unsigned Shift = cast<ConstantInt>(UserI->getOperand(1))->getZExtValue(); in SliceUpIllegalIntegerPHI() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/obj2yaml/ |
| H A D | coff2yaml.cpp | 175 uint32_t Shift = (COFFSection->Characteristics >> 20) & 0xF; in dumpSections() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kFrameLowering.cpp | 846 unsigned Shift = MRI.getSpillRegisterOrder(Reg); in spillCalleeSavedRegisters() local
881 unsigned Shift = MRI.getSpillRegisterOrder(Reg); in restoreCalleeSavedRegisters() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 1041 Value *Op, unsigned Shift) { in UpgradeX86PSLLDQIntrinsics()
1075 unsigned Shift) { in UpgradeX86PSRLDQIntrinsics()
1156 Value *Op1, Value *Shift, in UpgradeX86ALIGNIntrinsics()
2554 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2560 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2567 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
2573 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); in UpgradeIntrinsicCall() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| H A D | BlockFrequencyInfoImpl.cpp | 214 static uint64_t shiftRightAndRound(uint64_t N, int Shift) { in shiftRightAndRound()
242 int Shift = 0; in normalize() local
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