Searched defs:Setcc (Results 1 – 4 of 4) sorted by relevance
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4858 tryVPTESTM(SDNode * Root,SDValue Setcc,SDValue InMask) tryVPTESTM() argument
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| H A D | X86ISelLowering.cpp | 44430 SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode); combinePredicateReduction() local
53782 SDValue Setcc = DAG.getNode(X86ISD::SETCC_CARRY, DL, VT, N0->getOperand(0), combineSext() local
53998 SDValue Setcc = DAG.getNode(X86ISD::SETCC_CARRY, dl, VT, N0->getOperand(0), combineZext() local
54060 SDValue Setcc = DAG.getSetCC(DL, OpVT, LHS, RHS, CC); truncateAVX512SetCCNoBWI() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8995 SDValue Setcc = lowerCttzElts() local
13815 SDValue Setcc = DAG.getSetCC(SDLoc(N00), N0.getOperand(0).getValueType(), performXORCombine() local
15657 SDValue Setcc = Cond.getOperand(0); tryDemorganOfBooleanCondition() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6843 SDValue Setcc = DAG.getSetCC(DL, CCVT, NewAnd, Zero, ISD::SETEQ); combineShiftAnd1ToBitTest() local
[all...] |