Searched defs:ScalarSizeInBits (Results 1 – 4 of 4) sorted by relevance
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LowLevelType.h | |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1380 unsigned ScalarSizeInBits = VT.getScalarSizeInBits(); ExpandBITREVERSE() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1676 unsigned const ScalarSizeInBits = Ty.getScalarSizeInBits(); applyShiftImmedChain() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5438 int ScalarSizeInBits = VectorSizeInBits / Size; computeZeroableShuffleElements() local
9265 isLaneCrossingShuffleMask(unsigned LaneSizeInBits,unsigned ScalarSizeInBits,ArrayRef<int> Mask) isLaneCrossingShuffleMask() argument
9288 isMultiLaneShuffleMask(unsigned LaneSizeInBits,unsigned ScalarSizeInBits,ArrayRef<int> Mask) isMultiLaneShuffleMask() argument
11508 matchShuffleAsShift(MVT & ShiftVT,unsigned & Opcode,unsigned ScalarSizeInBits,ArrayRef<int> Mask,int MaskOffset,const APInt & Zeroable,const X86Subtarget & Subtarget) matchShuffleAsShift() argument
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