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Searched defs:ScalableOffset (Results 1 – 6 of 6) sorted by relevance

/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp445 appendScalableVectorExpression(const TargetRegisterInfo & TRI,SmallVectorImpl<char> & Expr,int FixedOffset,int ScalableOffset,llvm::raw_string_ostream & Comment) appendScalableVectorExpression() argument
473 createDefCFAExpression(const TargetRegisterInfo & TRI,Register Reg,uint64_t FixedOffset,uint64_t ScalableOffset) createDefCFAExpression() argument
502 createDefCFAOffset(const TargetRegisterInfo & TRI,Register Reg,uint64_t FixedOffset,uint64_t ScalableOffset) createDefCFAOffset() argument
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/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h2337 isLegalAddressingMode(Type * Ty,GlobalValue * BaseGV,int64_t BaseOffset,bool HasBaseReg,int64_t Scale,unsigned AddrSpace,Instruction * I,int64_t ScalableOffset) isLegalAddressingMode() argument
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp2735 StackOffset ScalableOffset = {}; resolveFrameOffsetReference() local
/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2794 int64_t ScalableOffset = 0; global() member
/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp1822 int64_t ScalableOffset = isAMCompletelyFolded() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp1093 int64_t ScalableOffset = N1.getOpcode() == ISD::VSCALE reassociationCanBreakAddressingModePattern() local
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