| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 37 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; in getSubReg() local
49 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; in getSubRegIndex() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.cpp | 29 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); in initialize() local
59 const SIRegisterInfo *SRI, in initCandidate()
146 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); in pickNodeFromQueue() local
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| H A D | AMDGPUMachineCFGStructurizer.cpp | 2085 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { in prunePHIInfo() local
2096 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { in prunePHIInfo() local
2129 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { in createEntryPHI() local
2134 auto SRI = PHIInfo.sources_begin(DestReg); in createEntryPHI() local
2145 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) { in createEntryPHI() local
2245 auto SRI = PHIInfo.sources_begin(DestReg); in resolvePHIInfos() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_vmid.h | 39 #define SRI(reg_name, block, id)\ macro
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| H A D | dcn20_mmhubbub.h | 45 #define SRI(reg_name, block, id)\ macro
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| H A D | dcn20_dwb.h | 43 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | amdgpu_dce112_clk_mgr.c | 46 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | amdgpu_dce110_clk_mgr.c | 44 #define SRI(reg_name, block, id)\ macro
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CriticalAntiDepBreaker.cpp | 261 for (MCSubRegIterator SRI(PhysReg, TRI, true); SRI.isValid(); ++SRI) in ScanInstruction() local
294 for (MCSubRegIterator SRI(Reg, TRI, true); SRI.isValid(); ++SRI) { in ScanInstruction() local
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| H A D | VirtRegMap.cpp | 307 LiveInterval::const_iterator &SRI = RangeIterPair.second; in addLiveInsForSubRanges() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/ |
| H A D | amdgpu_irq_service_dce120.c | 105 #define SRI(reg_name, block, id)\ macro
|
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/ |
| H A D | amdgpu_irq_service_dcn20.c | 188 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/ |
| H A D | amdgpu_irq_service_dcn10.c | 186 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/ |
| H A D | amdgpu_irq_service_dcn21.c | 184 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 79 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in initReg() local
144 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); in init() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyCFGSort.cpp | 223 SortRegionInfo SRI(MLI, WEI); in sortBlocks() local
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| H A D | WebAssemblyCFGStackify.cpp | 402 SortRegionInfo SRI(MLI, WEI); in placeLoopMarker() local
472 SortRegionInfo SRI(MLI, WEI); in placeTryMarker() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.h | 42 #define SRI(reg_name, block, id)\ macro
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| H A D | amdgpu_dcn10_resource.c | 180 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/ |
| H A D | amdgpu_dce100_resource.c | 143 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_resource.c | 146 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
| H A D | amdgpu_dce80_resource.c | 160 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
| H A D | amdgpu_dce112_resource.c | 153 #define SRI(reg_name, block, id)\ macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 315 SubRegMap::const_iterator SRI = Map.find(Comp.first); in computeSubRegs() local
1724 for (auto SRI : SRM) { in normalizeWeight() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | amdgpu_dce110_resource.c | 154 #define SRI(reg_name, block, id)\ macro
|