| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.h | 62 enum { SExt, ZExt }; enumerator
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFCheckAndAdjustIR.cpp | 178 SExtInst *SExt; global() member
196 } else if (auto *SExt = dyn_cast<SExtInst>(V)) { sinkMinMaxInBB() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LowerExpectIntrinsic.cpp | 153 if (SExtInst *SExt = dyn_cast<SExtInst>(V)) { in handlePhiDef() local
|
| H A D | NaryReassociate.cpp | 364 if (SExtInst *SExt = dyn_cast<SExtInst>(IndexToSplit)) { in tryReassociateGEPAtIndex() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMParallelDSP.cpp | 103 if (auto *SExt = dyn_cast<SExtInst>(V)) { InsertMuls() local
323 if (auto *SExt = dyn_cast<SExtInst>(V)) { IsNarrowSequence() local
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 37 SExt, // The value is sign extended in the location. enumerator
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InterleavedLoadCombinePass.cpp | 170 SExt, enumerator
|
| H A D | CodeGenPrepare.cpp | 4546 promoteOperandForTruncAndAnyExt(Instruction * SExt,TypePromotionTransaction & TPT,InstrToOrigTy & PromotedInsts,unsigned & CreatedInstsCost,SmallVectorImpl<Instruction * > * Exts,SmallVectorImpl<Instruction * > * Truncs,const TargetLowering & TLI) promoteOperandForTruncAndAnyExt() argument
[all...] |
| /freebsd-src/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 332 void setSignExt(bool SExt) { in setSignExt() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 1010 const auto *SExt = cast<SExtInst>(I); selectSExt() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 293 int32_t SExt = static_cast<int16_t>(Lo); tryFoldImmWithOpSel() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 297 const SCEVSignExtendExpr *SExt = cast<SCEVSignExtendExpr>(this); in print() local
2191 const SCEV *SExt = getSignExtendExpr(Op, Ty); getAnyExtendExpr() local
5390 const SCEVSignExtendExpr *SExt = dyn_cast<SCEVSignExtendExpr>(Op); isSimpleCastedPHI() local
6666 const SCEVSignExtendExpr *SExt = cast<SCEVSignExtendExpr>(S); getRangeRef() local
10043 if (const SCEVSignExtendExpr *SExt = dyn_cast<SCEVSignExtendExpr>(S)) stripInjectiveFunctions() local
10788 if (const auto *SExt = dyn_cast<SCEVSignExtendExpr>(S)) isKnownNonZero() local
12479 const SCEVSignExtendExpr *SExt = dyn_cast<SCEVSignExtendExpr>(LHS); isKnownPredicateExtendIdiom() local
12491 const SCEVSignExtendExpr *SExt = dyn_cast<SCEVSignExtendExpr>(RHS); isKnownPredicateExtendIdiom() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 4669 } else if (const auto *SExt = dyn_cast<SExtInst>(Src0)) { selectMul() local
4733 } else if (const auto *SExt = dyn_cast<SExtInst>(Op0)) { selectShift() local
[all...] |
| H A D | AArch64ISelLowering.cpp | 3646 SDValue SExt = getAArch64Cmp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 2472 auto *SExt = Builder.CreateSExt(X, Ty, X->getName() + ".signext"); visitAnd() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 5508 bool SExt = CB.paramHasAttr(ArgNo, Attribute::SExt); getShadowExtension() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1684 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Mul.getValueType(), PromoteIntRes_XMULO() local
|
| H A D | TargetLowering.cpp | 4564 bool SExt = (N0Opc == ISD::SIGN_EXTEND); SimplifySetCC() local
|
| H A D | DAGCombiner.cpp | 4061 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0)); visitSUB() local
13634 SDValue SExt = widenAbs() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 14363 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, In, performSRACombine() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 54451 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Op0.getOperand(0)); combineAdd() local
54458 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Op1.getOperand(0)); combineAdd() local
[all...] |