/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2219 unsigned Rt2 = Rt + 1; DecodeAddrMode3Instruction() local 5799 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); DecodeVMOVSRR() local 5825 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); DecodeVMOVRRS() local 5882 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); DecodeT2LDRDPreInstruction() local 5919 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); DecodeT2STRDPreInstruction() local 5988 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4); DecodeSwap() local 6199 unsigned Rt2 = fieldFromInstruction(Val, 16, 4); DecoderForMRRC2AndMCRR2() local 6800 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); DecodeMVEVMOVQtoDReg() local 6824 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); DecodeMVEVMOVDRegtoQ() local [all...] |
/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.cpp | 701 uint32_t Rt2 = Bits32(opcode, 14, 10); in EmulateLDPSTP() local
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/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 1422 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); DecodeExclusiveLdStInstruction() local 1505 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); DecodePairLdStInstruction() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 5355 unsigned Rt2 = Inst.getOperand(2).getReg(); validateInstruction() local 5380 unsigned Rt2 = Inst.getOperand(1).getReg(); validateInstruction() local 5393 unsigned Rt2 = Inst.getOperand(2).getReg(); validateInstruction() local 5409 unsigned Rt2 = Inst.getOperand(2).getReg(); validateInstruction() local 5490 unsigned Rt2 = Inst.getOperand(2).getReg(); validateInstruction() local [all...] |
/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 7415 unsigned Rt2 = MRI->getEncodingValue(Reg2); ParseInstruction() local 7554 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg()); validateLDRDSTRD() local [all...] |
/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 11162 uint32_t Rt2 = ReadCoreReg(t2, &success); in EmulateSTRDReg() local
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/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 8381 Value *Rt2 = Builder.CreateLShr(Call, 32); EmitAMDGCNBallotForExec() local 8613 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); EmitARMBuiltinExpr() local
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