Rn (definition) in projects: freebsd-src

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Searched defs:Rn (Results 1 – 11 of 11) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	1869 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeCopMemInstruction() local 2044 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeAddrMode2IdxInstruction() local 2150 unsigned Rn = fieldFromInstruction(Val, 13, 4); DecodeSORegMemOperand() local 2208 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeAddrMode3Instruction() local 2399 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeRFEInstruction() local 2431 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeQADDInstruction() local 2454 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeMemMultipleWritebackInstruction() local 2739 unsigned Rn = fieldFromInstruction(Insn, 0, 4); DecodeSMLAInstruction() local 2768 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeTSTInstruction() local 2820 unsigned Rn = fieldFromInstruction(Val, 13, 4); DecodeAddrModeImm12Operand() local 2839 unsigned Rn = fieldFromInstruction(Val, 9, 4); DecodeAddrMode5Operand() local 2860 unsigned Rn = fieldFromInstruction(Val, 9, 4); DecodeAddrMode5FP16Operand() local 2965 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLDInstruction() local 3297 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVSTInstruction() local 3567 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD1DupInstruction() local 3615 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD2DupInstruction() local 3664 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD3DupInstruction() local 3700 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD4DupInstruction() local 3902 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeTBLInstruction() local 3989 unsigned Rn = fieldFromInstruction(Val, 0, 3); DecodeThumbAddrModeRR() local 4005 unsigned Rn = fieldFromInstruction(Val, 0, 3); DecodeThumbAddrModeIS() local 4040 unsigned Rn = fieldFromInstruction(Val, 6, 4); DecodeT2AddrModeSOReg() local 4071 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LoadShift() local 4154 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LoadImm8() local 4239 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LoadImm12() local 4319 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LoadT() local 4442 unsigned Rn = fieldFromInstruction(Val, 9, 4); DecodeT2AddrModeImm8s4() local 4458 unsigned Rn = fieldFromInstruction(Val, 8, 4); DecodeT2AddrModeImm7s4() local 4474 unsigned Rn = fieldFromInstruction(Val, 8, 4); DecodeT2AddrModeImm0_1020s4() local 4517 unsigned Rn = fieldFromInstruction(Val, 9, 4); DecodeT2AddrModeImm8() local 4565 unsigned Rn = fieldFromInstruction(Val, 8, 3); DecodeTAddrModeImm7() local 4582 unsigned Rn = fieldFromInstruction(Val, 8, 4); DecodeT2AddrModeImm7() local 4601 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LdStPre() local 4662 unsigned Rn = fieldFromInstruction(Val, 13, 4); DecodeT2AddrModeImm12() local 4752 unsigned Rn = fieldFromInstruction(Insn, 3, 4); DecodeMveAddrModeRQ() local 4835 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeThumbTableBranch() local 5096 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeDoubleRegLoad() local 5119 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeDoubleRegStore() local 5143 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeLDRPreImm() local 5169 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeLDRPreReg() local 5197 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeSTRPreImm() local 5223 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeSTRPreReg() local 5248 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD1LN() local 5315 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVST1LN() local 5380 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD2LN() local 5447 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVST2LN() local 5510 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD3LN() local 5580 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVST3LN() local 5643 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVLD4LN() local 5724 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeVST4LN() local 5880 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2LDRDPreInstruction() local 5917 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2STRDPreInstruction() local 5986 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeSwap() local 6164 unsigned Rn = fieldFromInstruction(Val, 16, 4); DecodeLDR() local 6363 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeLOLoop() local 6701 unsigned Rn = fieldFromInstruction(Val, 16, 4); DecodeVSTRVLDR_SYSREG() local 6720 DecodeMVE_MEM_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder,unsigned Rn,OperandDecoder RnDecoder,OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument 6984 unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeMveVCTP() local 7003 const unsigned Rn = fieldFromInstruction(Insn, 16, 4); DecodeT2AddSubSPImm() local [all...]
/freebsd-src/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A D	EmulateInstructionARM.cpp	2480 Rn; // This function assumes Rn is the SP, but we should verify that. in EmulateSTRRtSP() local 2951 uint32_t Rn; // the base register which contains the address of the table of EmulateTB() local 3101 uint64_t Rn = EmulateADDImmThumb() local 3152 uint32_t Rd, Rn; EmulateADDImmARM() local 3218 uint32_t Rd, Rn, Rm; EmulateADDReg() local 3300 uint32_t Rn; // the first operand EmulateCMNImm() local 3348 uint32_t Rn; // the first operand EmulateCMNReg() local 3413 uint32_t Rn; // the first operand EmulateCMPImm() local 3465 uint32_t Rn; // the first operand EmulateCMPReg() local 3839 uint32_t Rn; // the first operand register EmulateShiftReg() local 4091 addr_t Rn = ReadCoreReg(n, &success); EmulateLDMDA() local 4228 addr_t Rn = EmulateLDMDB() local 4338 addr_t Rn = EmulateLDMIB() local 4429 uint32_t Rn; // the base register EmulateLDRRtRnImm() local 4768 addr_t Rn = ReadCoreReg(n, &success); EmulateSTMDA() local 4915 addr_t Rn = EmulateSTMDB() local 5039 addr_t Rn = ReadCoreReg(n, &success); EmulateSTMIB() local 5713 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTRHRegister() local 5801 uint32_t Rd, Rn; EmulateADCImm() local 5871 uint32_t Rd, Rn, Rm; EmulateADCReg() local 6018 uint32_t Rd, Rn; EmulateANDImm() local 6094 uint32_t Rd, Rn, Rm; EmulateANDReg() local 6183 uint32_t Rd, Rn; EmulateBICImm() local 6259 uint32_t Rd, Rn, Rm; EmulateBICReg() local 6579 uint32_t Rn = EmulateLDRRegister() local 6763 uint32_t Rn = EmulateLDRBImmediate() local 7011 uint32_t Rn = EmulateLDRBRegister() local 7145 uint32_t Rn = EmulateLDRHImmediate() local 7426 uint64_t Rn = EmulateLDRHRegister() local 7582 uint64_t Rn = ReadCoreReg(n, &success); EmulateLDRSBImmediate() local 7831 uint64_t Rn = EmulateLDRSBRegister() local 7981 uint64_t Rn = EmulateLDRSHImmediate() local 8250 uint64_t Rn = EmulateLDRSHRegister() local 8740 uint64_t Rn = EmulateRFE() local 8822 uint32_t Rd, Rn; EmulateEORImm() local 8901 uint32_t Rd, Rn, Rm; EmulateEORReg() local 8991 uint32_t Rd, Rn; EmulateORRImm() local 9068 uint32_t Rd, Rn, Rm; EmulateORRReg() local 9156 uint32_t Rn; // the first operand EmulateRSBImm() local 9229 uint32_t Rn; // the first operand EmulateRSBReg() local 9307 uint32_t Rn; // the first operand EmulateRSCImm() local 9367 uint32_t Rn; // the first operand EmulateRSCReg() local 9436 uint32_t Rn; // the first operand EmulateSBCImm() local 9505 uint32_t Rn; // the first operand EmulateSBCReg() local 9585 uint32_t Rn; // the first operand EmulateSUBImmThumb() local 9679 uint32_t Rn; // the first operand EmulateSUBImmARM() local 9750 uint32_t Rn; EmulateTEQImm() local 9810 uint32_t Rn, Rm; EmulateTEQReg() local 9875 uint32_t Rn; EmulateTSTImm() local 9935 uint32_t Rn, Rm; EmulateTSTReg() local 10150 uint32_t Rn = ReadCoreReg(n, &success); EmulateADDRegShift() local 10282 uint32_t Rn = ReadCoreReg(n, &success); EmulateSUBReg() local 10381 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTREX() local 10476 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTRBImmARM() local 10569 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTRImmARM() local 10714 uint32_t Rn = ReadCoreReg(n, &success); EmulateLDRDImmediate() local 10835 uint32_t Rn = ReadCoreReg(n, &success); EmulateLDRDRegister() local 10986 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTRDImm() local 11115 uint32_t Rn = ReadCoreReg(n, &success); EmulateSTRDReg() local 11291 uint32_t Rn = ReadCoreReg(n, &success); EmulateVLDM() local 11489 uint32_t Rn = ReadCoreReg(n, &success); EmulateVSTM() local 11647 uint32_t Rn = ReadCoreReg(n, &success); EmulateVLDR() local 11779 uint32_t Rn = ReadCoreReg(n, &success); EmulateVSTR() local 11944 uint32_t Rn = ReadCoreReg(n, &success); EmulateVLD1Multiple() local 12108 uint32_t Rn = ReadCoreReg(n, &success); EmulateVLD1Single() local 12276 uint32_t Rn = ReadCoreReg(n, &success); EmulateVST1Multiple() local 12443 uint32_t Rn = ReadCoreReg(n, &success); EmulateVST1Single() local 12565 uint32_t Rn = ReadCoreReg(n, &success); EmulateVLD1SingleAll() local 12717 uint32_t Rn = ReadCoreReg(n, &success); EmulateSUBSPcLrEtc() local [all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	955 unsigned Rn = fieldFromInstruction(Insn, 5, 5); DecodeFMOVLaneInstruction() local 1054 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeThreeAddrSRegInstruction() local 1149 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeUnsignedLdStInstruction() local 1208 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeSignedLdStInstruction() local 1406 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeExclusiveLdStInstruction() local 1489 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodePairLdStInstruction() local 1623 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeAuthLoadInstruction() local 1656 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeAddSubERegInstruction() local 1713 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeLogicalImmInstruction() local 1819 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeAddSubImmShift() local 2051 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeCPYMemOpInstruction() local 2076 unsigned Rn = fieldFromInstruction(insn, 5, 5); DecodeSETMemOpInstruction() local 2105 uint64_t Rn = fieldFromInstruction(insn, 5, 5); DecodePRFMRegInstruction() local [all...]
/freebsd-src/sys/arm64/arm64/
H A D	undefined.c	`206 int attempts, error, Rn, Rd, Rm; in swp_emulate() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A D	ARMMCCodeEmitter.cpp	922 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1058 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() local 1276 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1373 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1383 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1420 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
/freebsd-src/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A D	EmulateInstructionARM64.cpp	`619 const uint32_t Rn = Bits32(opcode, 9, 5); EmulateADDSUBImm() local 700 uint32_t Rn = Bits32(opcode, 9, 5); EmulateLDPSTP() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	Thumb2SizeReduction.cpp	`466 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local`
H A D	ARMBaseInstrInfo.cpp	`3595 Register Rn = MI.getOperand(2).getReg(); getNumMicroOpsSwiftLdSt() local 3621 Register Rn = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3631 Register Rn = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3668 Register Rn = MI.getOperand(2).getReg(); getNumMicroOpsSwiftLdSt() local`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A D	AArch64AsmParser.cpp	`5273 unsigned Rn = Inst.getOperand(3).getReg(); validateInstruction() local 5327 unsigned Rn = Inst.getOperand(3).getReg(); validateInstruction() local 5359 unsigned Rn = Inst.getOperand(2).getReg(); validateInstruction() local 5378 unsigned Rn = Inst.getOperand(2).getReg(); validateInstruction() local 5394 unsigned Rn = Inst.getOperand(2).getReg(); validateInstruction() local 5408 unsigned Rn = Inst.getOperand(3).getReg(); validateInstruction() local [all...]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	7471 unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); validateLDRDSTRD() local 7675 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); validateInstruction() local 7688 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(1).getReg()); validateInstruction() local 7836 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); validateInstruction() local 7911 unsigned Rn = Inst.getOperand(0).getReg(); validateInstruction() local 10595 unsigned Rn = Inst.getOperand(0).getReg(); processInstruction() local 10619 unsigned Rn = Inst.getOperand(0).getReg(); processInstruction() local [all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A D	HexagonISelLoweringHVX.cpp	`953 int Rn = 0, Rm = 0; in buildHvxVectorReg() local`