Searched defs:Rev (Results 1 – 12 of 12) sorted by relevance
| /freebsd-src/contrib/llvm-project/clang/lib/Basic/Targets/ |
| H A D | SystemZ.cpp | 111 const auto Rev = in getISARevision() local
122 for (const ISANameRevision &Rev : ISARevisions) in fillValidCPUList() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 512 const bool Rev = HexagonMCInstrInfo::IsReverseVecRegPair(Producer); in getSingleInstruction() local
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| /freebsd-src/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 1597 class Rev : public SetTheory::Operator { emitDagShuffle() class
1601 Rev(unsigned ElementSize) : ElementSize(ElementSize) {} emitDagShuffle() function in Intrinsic::DagEmitter::emitDagShuffle::Rev
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| /freebsd-src/sys/dev/mwl/ |
| H A D | mwlhal.h | 545 uint8_t Rev; member
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| H A D | mwlreg.h | 875 uint8_t Rev; member
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| /freebsd-src/sys/contrib/edk2/Include/Uefi/ |
| H A D | UefiPxe.h | 715 PXE_UINT8 Rev; ///< PXE_ROMID_REV. member
812 PXE_UINT8 Rev; ///< PXE_ROMID_REV. member
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCInstrInfo.cpp | 1040 unsigned Rev = IsReverseVecRegPair(Producer); in SubregisterBit() local
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| /freebsd-src/stand/i386/libi386/ |
| H A D | pxe.h | 299 uint8_t Rev; member
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10306 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); LowerVecReduce() local
16653 __anon0445ea3b1d02(ShuffleVectorSDNode *SVN, bool Rev) PerformSplittingToNarrowingStores() argument
18782 unsigned Rev = VT == MVT::v4i32 ? ARMISD::VREV32 : ARMISD::VREV16; PerformMVEExtCombine() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11143 SDValue Rev = getDataClassTest(Op, ~Mask, Dl, DAG, Subtarget); getDataClassTest() local
11150 SDValue Rev(DAG.getMachineNode( getDataClassTest() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12261 SDValue Rev = DAG.getNode(AArch64ISD::REV64, dl, VT, V1); LowerVECTOR_SHUFFLE() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 51895 SDValue Rev = combineBITREVERSE() local
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