| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 358 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastMaterializeAlloca() local
381 unsigned ResultReg = createResultReg(RC); in materializeInt() local
417 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local
435 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP() local
459 unsigned ResultReg; in materializeGV() local
1037 unsigned ResultReg = createResultReg(&AArch64::GPR64spRegClass); in simplifyAddress() local
1048 unsigned ResultReg = 0; in simplifyAddress() local
1082 unsigned ResultReg; in simplifyAddress() local
1188 unsigned ResultReg = 0; in emitAddSub() local
1302 unsigned ResultReg; in emitAddSub_rr() local
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| H A D | AArch64InstrInfo.cpp | 5014 Register ResultReg = Root.getOperand(0).getReg(); in genFusedMultiply() local
5165 Register ResultReg = Root.getOperand(0).getReg(); in genMaddR() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 323 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad()
709 unsigned &ResultReg) { in X86FastEmitExtend()
1349 unsigned ResultReg = 0; in X86SelectLoad() local
1458 unsigned ResultReg = 0; in X86SelectCmp() local
1547 Register ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local
1605 Register ResultReg = getRegForValue(I->getOperand(0)); in X86SelectSExt() local
1860 Register ResultReg = createResultReg(RC); in X86SelectShift() local
2003 unsigned ResultReg = 0; in X86SelectDivRem() local
2148 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect() local
2204 unsigned ResultReg; in X86FastEmitSSESelect() local
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| H A D | X86InstructionSelector.cpp | 983 Register ResultReg = I.getOperand(0).getReg(); in selectFCmp() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 480 Register ResultReg = in selectBinaryOp() local
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp() local
528 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() local
1336 Register ResultReg = getRegForValue(II->getArgOperand(0)); in selectIntrinsicCall() local
1379 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() local
1413 Register ResultReg; in selectBitCast() local
1449 Register ResultReg = createResultReg(TyRegClass); in selectFreeze() local
1606 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() local
1659 unsigned ResultReg; in selectExtractValue() local
1879 Register ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Imm); in fastEmit_ri_() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 300 Register ResultReg = createResultReg(RC); in fastEmitInst_r() local
322 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr() local
349 unsigned ResultReg = createResultReg(RC); in fastEmitInst_ri() local
374 unsigned ResultReg = createResultReg(RC); in fastEmitInst_i() local
489 unsigned ResultReg = 0; in ARMMaterializeInt() local
660 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local
835 unsigned ResultReg = createResultReg(RC); in ARMSimplifyAddress() local
900 bool ARMFastISel::ARMEmitLoad(MVT VT, Register &ResultReg, Address &Addr, in ARMEmitLoad()
1032 Register ResultReg; in SelectLoad() local
1559 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT)); in SelectIToFP() local
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| H A D | ARMInstructionSelector.cpp | 688 auto ResultReg = MIB.getReg(0); in selectGlobal() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 589 unsigned ResultReg = createResultReg(MRI.getRegClass(Reg)); in copyValue() local
601 unsigned ResultReg = in fastMaterializeAlloca() local
620 unsigned ResultReg = in fastMaterializeConstant() local
718 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local
773 unsigned ResultReg; in selectCall() local
961 unsigned ResultReg = createResultReg(RC); in selectSelect() local
1077 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectICmp() local
1138 unsigned ResultReg = createResultReg(&WebAssembly::I32RegClass); in selectFCmp() local
1231 unsigned ResultReg = createResultReg(RC); in selectLoad() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 328 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp() local
344 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca() local
365 unsigned ResultReg = createResultReg(RC); in materialize32BitInt() local
637 bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) { in emitCmp()
756 bool MipsFastISel::emitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in emitLoad()
867 unsigned ResultReg; in selectLogicalOp() local
904 unsigned ResultReg; in selectLoad() local
985 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp() local
1058 unsigned ResultReg = createResultReg(RC); in selectSelect() local
1297 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 431 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress() local
450 bool PPCFastISel::PPCEmitLoad(MVT VT, Register &ResultReg, Address &Addr, in PPCEmitLoad()
611 Register ResultReg = 0; in SelectLoad() local
1051 Register ResultReg = 0; in PPCMoveToFPReg() local
1176 Register ResultReg = 0; in PPCMoveToIntReg() local
1298 unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp() local
1516 unsigned ResultReg = 0; in finishCall() local
1928 unsigned ResultReg = createResultReg(RC); in SelectIntExt() local
2125 unsigned ResultReg = createResultReg(RC); in PPCMaterialize32BitInt() local
2197 unsigned ResultReg = createResultReg(RC); in PPCMaterialize64BitInt() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 90 Register ResultReg; member
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 6077 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in moveScalarAddSub() local
6158 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerSelect() local
6183 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarAbs() local
6575 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitBCNT() local
6616 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
6640 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalar64BitBFE() local
6696 Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in movePackToVALU() local
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| H A D | SIRegisterInfo.cpp | 1737 Register ResultReg = in eliminateFrameIndex() local
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| H A D | SIISelLowering.cpp | 3496 unsigned InitReg, unsigned ResultReg, unsigned PhiReg, in emitLoadM0FromVGPRLoop()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 719 for (unsigned ResultReg : ResultRegs) in buildIntrinsic() local
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| H A D | LegalizerHelper.cpp | 1360 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0); in widenScalarMergeValues() local
6159 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); in lowerMergeValues() local
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