/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 254 for (MVT RegVT : RegParmTypes) { in analyzeMustTailForwardedRegisters() local
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | SwitchLoweringUtils.h | 213 MVT RegVT; member
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 1149 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local 1281 EVT RegVT = VA.getLocVT(); in LowerCall() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.cpp | 322 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 484 EVT RegVT = VA.getLocVT(); in LowerCallArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 893 MVT RegVT = TLI->getRegisterTypeForCallingConv(Context, CallConv, VT); in getReturnInfo() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 592 EVT RegVT = VA.getLocVT(); in LowerCall() local 893 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 642 EVT RegVT = VA.getLocVT(); in LowerCCCArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1301 EVT RegVT = VA.getLocVT(); in LowerCCCArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 700 EVT RegVT = ST->getValue().getValueType(); in tryTLSXFormStore() local 745 EVT RegVT = LD->getValueType(0); in tryTLSXFormLoad() local
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H A D | PPCISelLowering.cpp | 5363 const MVT RegVT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; in prepareDescriptorIndirectCall() local 5415 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in buildCallOperands() local 6520 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in CC_AIX() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 7395 EVT RegVT = Value.getValueType(); in scalarizeVectorStore() local 7493 MVT RegVT = getRegisterType(*DAG.getContext(), intVT); in expandUnalignedLoad() local 7643 MVT RegVT = getRegisterType( in expandUnalignedStore() local
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H A D | SelectionDAGBuilder.cpp | 8232 const MVT RegVT = *TRI.legalclasstypes_begin(*RC); in GetRegistersForValue() local 8614 MVT RegVT = AsmNodeOperands[CurOp+1].getSimpleValueType(); in visitInlineAsm() local 10199 MVT RegVT = TLI->getRegisterType(*CurDAG->getContext(), VT); in LowerArguments() local
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H A D | LegalizeIntegerTypes.cpp | 1423 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), VT); in PromoteIntRes_VAARG() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 841 MVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 3664 MVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2871 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization() local 4318 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3658 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local 4082 EVT RegVT = VA.getLocVT(); in LowerCall() local 24300 MVT RegVT = Op.getSimpleValueType(); in LowerLoad() local 45434 EVT RegVT = Ld->getValueType(0); in combineLoad() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4884 EVT RegVT = VA.getLocVT(); in LowerFormalArguments() local
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