| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64MIPeepholeOpt.cpp | 123 static bool splitBitmaskImm(T Imm, unsigned RegSize, T &Imm1Enc, T &Imm2Enc) { in splitBitmaskImm()
176 T &Imm1) -> std::optional<OpcodePair> { in visitAND()
302 static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) { in splitAddSubImm()
340 T &Imm1) -> std::optional<OpcodePair> { in visitADDSUB()
372 T &Imm1) -> std::optional<OpcodePair> { in visitADDSSUBS()
448 unsigned RegSize = sizeof(T) * 8; in splitTwoPartImm() local
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| H A D | AArch64FastISel.cpp | 1676 unsigned RegSize; in emitLogicalOp_ri() local
4066 unsigned RegSize = Is64Bit ? 64 : 32; in emitLSL_ri() local
4169 unsigned RegSize = Is64Bit ? 64 : 32; in emitLSR_ri() local
4285 unsigned RegSize = Is64Bit ? 64 : 32; in emitASR_ri() local
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| H A D | AArch64FrameLowering.cpp | 3048 auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8; in determineCalleeSaves() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 132 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); in estimateStackSize() local
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| H A D | MipsSEFrameLowering.cpp | 198 unsigned RegSize) { in expandLoadACC()
223 unsigned RegSize) { in expandStoreACC()
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| H A D | MipsCallLowering.cpp | 413 unsigned RegSize = 4; in lowerFormalArguments() local
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.cpp | 138 unsigned RegSize = TRI.getRegSizeInBits(*RC); in addMachineReg() local
291 unsigned RegSize = 0; in addMachineRegExpression() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86TileConfig.cpp | 179 unsigned RegSize = TRI->getRegSizeInBits(*MRI.getRegClass(R)); in INITIALIZE_PASS_DEPENDENCY() local
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| H A D | X86InstrInfo.cpp | 6358 unsigned RegSize = TRI.getRegSizeInBits(*RC); in isNonFoldablePartialRegisterLoad() local
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| /openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
| H A D | InfoByHwMode.h | 147 unsigned RegSize; member
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| H A D | RegisterInfoEmitter.cpp | 1089 uint32_t RegSize = 0; in runMCDesc() local
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| /openbsd-src/gnu/llvm/clang/lib/Basic/Targets/ |
| H A D | X86.h | 225 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, in validateGlobalRegisterVariable()
780 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, in validateGlobalRegisterVariable()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 429 auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8; in determineCalleeSaves() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 1024 unsigned RegSize = 8; in assignCalleeSavedSpillSlots() local
1404 const unsigned RegSize = MF.getDataLayout().getPointerSize(); in determineFrameLayout() local
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| H A D | SystemZInstrInfo.cpp | 918 unsigned RegSize = 0; member
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 512 unsigned RegSize = Ty.isValid() ? Ty.getSizeInBits() : 0; in getRegSizeInBits() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 214 static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, in processLogicalImmediate()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 241 unsigned RegSize, SpillSize, SpillAlignment; member
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 559 int RegSize; in sizeOfSPAdjustment() local
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| /openbsd-src/gnu/llvm/clang/include/clang/Basic/ |
| H A D | TargetInfo.h | 1130 unsigned RegSize, in validateGlobalRegisterVariable()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 857 unsigned RegSize = RegVT.getSizeInBits(); in LowerFormalArguments() local
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 4883 CharUnits RegSize = CharUnits::fromQuantity((isInt || IsSoftFloatABI) ? 4 : 8); in EmitVAArg() local
6046 int RegSize = IsIndirect ? 8 : TySize.getQuantity(); in EmitAAPCSVAArg() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4573 unsigned RegSize = Ty.getSizeInBits(); in emitTST() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 273 unsigned RegSize = Ty.getSizeInBits(); in isLoadStoreSizeLegal() local
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 728 unsigned RegSize = RegTy.getSizeInBits(); in matchCombineLoadWithAndMask() local
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