| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrFoldTables.cpp | 5547 lookupFoldTableImpl(ArrayRef<X86MemoryFoldTableEntry> Table, unsigned RegOp) { in lookupFoldTableImpl()
5604 llvm::lookupTwoAddrFoldTable(unsigned RegOp) { in lookupTwoAddrFoldTable()
5609 llvm::lookupFoldTable(unsigned RegOp, unsigned OpNum) { in lookupFoldTable()
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| H A D | X86MCInstLower.cpp | 378 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 214 const MCOperand &RegOp) { in printMemoryBaseRegister()
240 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
255 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
276 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFInstPrinter.cpp | 67 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiAsmPrinter.cpp | 130 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRAsmPrinter.cpp | 99 const MachineOperand &RegOp = MI->getOperand(OpNum); in PrintAsmOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 89 struct RegOp { struct
90 unsigned RegNum;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 237 struct RegOp { struct in __anon6f8db8bd0211::SparcOperand
238 unsigned RegNum;
239 RegisterKind Kind;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.cpp | 137 auto RegOp = MI.getOperand(OpNo); in encodeMemri() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 90 struct RegOp { struct
91 unsigned RegNum;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 1641 unsigned RegOp = CurOp++; in encodeInstruction() local
1654 unsigned RegOp = CurOp++; in encodeInstruction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 44 struct RegOp { struct
45 unsigned RegNo;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 287 Register RegOp = VisitedPHI->getOperand(PHIOp).getReg(); in collectUnprimedAccPHIs() local
334 Register RegOp = PHI->getOperand(PHIOp).getReg(); in convertUnprimedAccPHIs() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 122 struct RegOp { struct
123 unsigned RegNum;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 105 struct RegOp { struct in __anond0f948490111::SystemZOperand
106 RegisterKind Kind;
107 unsigned Num;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1431 const MachineOperand *RegOp = nullptr; in isOMod() local
1484 const MachineOperand *RegOp; in tryFoldOMod() local
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| H A D | AMDGPUMachineCFGStructurizer.cpp | 1860 MachineOperand RegOp = MachineOperand::CreateReg(Reg, false, false, true); in createIfBlock() local
2319 MachineOperand RegOp = in createIfRegion() local
2378 MachineOperand RegOp = MachineOperand::CreateReg(Reg, false, false, true); in createIfRegion() local
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| H A D | SIInstrInfo.cpp | 1098 MachineOperand RegOp = Cond[1]; in insertVectorSelect() local
1112 MachineOperand RegOp = Cond[1]; in insertVectorSelect() local
2041 MachineOperand &RegOp, in swapRegAndNonRegOperand()
7587 auto &RegOp = MI.getOperand(1 + 2 * I); in getRegSequenceSubReg() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 528 inline unsigned getRegState(const MachineOperand &RegOp) { in getRegState()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 172 struct RegOp { struct in __anonf0f8b3610211::VEOperand
173 unsigned RegNum;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 347 struct RegOp { struct in __anon65f0dadd0111::AArch64Operand
348 unsigned RegNum;
349 RegKind Kind;
350 int ElementWidth;
354 RegConstraintEqualityTy EqualityTy;
370 ShiftExtendOp ShiftExtend;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 586 unsigned RegOp = OpNum; in PrintAsmOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 814 MachineOperand &RegOp = I.getOperand(1); in copySubReg() local
941 MachineOperand &RegOp = I.getOperand(1); in selectCopy() local
2430 MachineOperand &RegOp = I.getOperand(0); in select() local
4887 MachineOperand &RegOp = I.getOperand(1); in selectBuildVector() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 269 struct RegOp { struct
270 MCRegister RegNum;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 398 unsigned RegOp = FirstHalf ? OpNum : OpNum + 1; in PrintAsmOperand() local
|