| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.cpp | 34 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
97 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
243 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.cpp | 24 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS() local
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
289 ArrayRef<MCPhysReg> RegList) { in CustomAssignInRegList()
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| H A D | Thumb2ITBlockPass.cpp | 83 using RegList = SmallVector<unsigned, 4>; in INITIALIZE_PASS() typedef
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| H A D | ARMAsmPrinter.cpp | 1222 SmallVector<unsigned, 4> RegList; in EmitUnwindingInstruction() local
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| H A D | ARMBaseInstrInfo.cpp | 2558 SmallVector<MachineOperand, 4> RegList; tryFoldSPUpdateIntoPushPop() local
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| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 159 ListInit *RegList = Action->getValueAsListInit("RegList"); EmitAction() local
212 ListInit *RegList = Action->getValueAsListInit("RegList"); EmitAction() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.cpp | 132 ArrayRef<MCPhysReg> RegList; CC_AArch64_Custom_Block() local
[all...] |
| H A D | AArch64RegisterInfo.cpp | 574 __anon178caa8a0202(ArrayRef<MCRegister> RegList, MCRegister Reg) isArgumentRegister() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFStreamer.cpp | 167 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool isVector) emitRegSave() argument
776 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool isVector) emitRegSave() argument
1403 collectHWRegs(const MCRegisterInfo & MRI,unsigned Idx,const SmallVectorImpl<unsigned> & RegList,bool IsVector,uint32_t & Mask_) collectHWRegs() argument
1425 emitRegSave(const SmallVectorImpl<unsigned> & RegList,bool IsVector) emitRegSave() argument
[all...] |
| H A D | ARMTargetStreamer.cpp | 99 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2572 const SmallVectorImpl<unsigned> &RegList = getRegList(); addRegListOperands() local
2579 const SmallVectorImpl<unsigned> &RegList = getRegList(); addRegListWithAPSROperands() local
4014 const SmallVectorImpl<unsigned> &RegList = getRegList(); print() local
8252 auto &RegList = Op.getRegList(); validateInstruction() local
12264 const SmallVectorImpl<unsigned> &RegList = Op.getRegList(); parseDirectiveSEHSaveRegs() local
12306 const SmallVectorImpl<unsigned> &RegList = Op.getRegList(); parseDirectiveSEHSaveFRegs() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 469 ArrayRef<MCPhysReg> RegList; in AnalyzeArguments() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 191 RegListOp RegList; member
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 61 static const MCPhysReg RegList[] = { in CC_Sparc_Assign_Split_64() local
87 static const MCPhysReg RegList[] = { in CC_Sparc_Assign_Ret_Split_64() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 894 struct RegListOp RegList; member
[all...] |