Searched defs:RegClassID (Results 1 – 10 of 10) sorted by relevance
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelDAGToDAG.cpp | 104 unsigned RegClassID; Select() local
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H A D | AMDGPUISelDAGToDAG.cpp | 434 SelectBuildVector(SDNode * N,unsigned RegClassID) SelectBuildVector() argument 559 unsigned RegClassID = Select() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVRVVInitUndef.cpp |
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H A D | RISCVISelDAGToDAG.cpp | 252 unsigned RegClassID; createTuple() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64A57FPLoadBalancing.cpp | 517 unsigned RegClassID = ChainBegin->getDesc().operands()[0].RegClass; in scavengeRegister() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.cpp | 77 static bool isMemOperand(const MCInst &MI, unsigned Op, unsigned RegClassID) { in isMemOperand() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 1633 GetSIDIForRegClass(unsigned RegClassID,unsigned Reg,bool IsSIReg) GetSIDIForRegClass() argument 1669 int RegClassID = -1; VerifyAndAdjustOperands() local 4738 parseSEHRegisterNumber(unsigned RegClassID,MCRegister & RegNo) parseSEHRegisterNumber() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
H A D | AMDGPUDisassembler.cpp | 1270 createRegOperand(unsigned RegClassID,unsigned Val) const createRegOperand() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 1938 DecodeGPRSeqPairsClassRegisterClass(MCInst & Inst,unsigned RegClassID,unsigned RegNo,uint64_t Addr,const MCDisassembler * Decoder) DecodeGPRSeqPairsClassRegisterClass() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
H A D | RISCVAsmParser.cpp | 1275 unsigned RegClassID; convertVRToVRMx() local
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