Searched defs:RegClass (Results 1 – 13 of 13) sorted by relevance
45 std::unique_ptr<RCInfo[]> RegClass; variable
153 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { in scavengeRegister()
92 MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){ in createVirtualRegister()
49 short RegClass = MCID.OpInfo[OpNum].RegClass; in getRegClass() local
1550 SDValue RegClass = in createGPRPairNode() local1561 SDValue RegClass = in createSRegPairNode() local1572 SDValue RegClass = CurDAG->getTargetConstant(ARM::QPRRegClassID, MVT::i32); in createDRegPairNode() local1582 SDValue RegClass = CurDAG->getTargetConstant(ARM::QQPRRegClassID, MVT::i32); in createQRegPairNode() local1593 SDValue RegClass = in createQuadSRegsNode() local1608 SDValue RegClass = CurDAG->getTargetConstant(ARM::QQPRRegClassID, MVT::i32); in createQuadDRegsNode() local1622 SDValue RegClass = CurDAG->getTargetConstant(ARM::QQQQPRRegClassID, MVT::i32); in createQuadQRegsNode() local
163 int RegClass = Desc.OpInfo[OpIdx].RegClass; in getOperandRegClass() local323 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, MVT::i32); in Select() local
1764 static bool isVSrc(unsigned RegClass) { in isVSrc()
1151 int RegClass = Desc.OpInfo[i].RegClass; in verifyInstruction() local
1273 for (auto &RegClass : RegClasses) { in computeSubRegLaneMasks() local1327 for (auto &RegClass : RegBank.getRegClasses()) { in computeUberSets() local
1353 Record *RegClass = R->getValueAsDef("RegClass"); in getImplicitType() local
1685 const TargetRegisterClass *RegClass = in constrainOperandRegClass() local
279 unsigned &RegClass, unsigned &Cost, in GetCostForDef()
2103 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) { in matchRegisterByNumber()