Home
last modified time | relevance | path

Searched defs:RegA (Results 1 – 12 of 12) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86DynAllocaExpander.cpp226 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
240 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
254 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower() local
H A DX86RegisterInfo.cpp627 auto IsSubReg = [&](MCRegister RegA, MCRegister RegB) { in isArgumentRegister()
634 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); }) || in isArgumentRegister()
644 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
649 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
656 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCRegisterInfo.h560 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
568 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
574 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
580 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
659 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp436 static bool regsAreCompatible(Register RegA, Register RegB, in regsAreCompatible()
526 bool TwoAddressInstructionPass::isProfitableToCommute(Register RegA, in isProfitableToCommute()
653 Register RegA = MI->getOperand(DstIdx).getReg(); in commuteInstruction() local
662 bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA, in isProfitableToConv3Addr()
681 Register RegA, Register RegB, unsigned &Dist) { in convertInstTo3Addr()
1468 Register RegA = DstMO.getReg(); in processTiedPairs() local
1653 Register RegA = DstMO.getReg(); in processStatepoint() local
H A DImplicitNullChecks.cpp286 Register RegA = MOA.getReg(); in canReorder() local
H A DTargetInstrInfo.cpp958 Register RegA = OpA.getReg(); in reassociateOps() local
/openbsd-src/gnu/llvm/llvm/lib/MC/
H A DMCRegisterInfo.cpp126 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { in regsOverlap()
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVModuleAnalysis.cpp268 Register RegA = A.getOperand(i).getReg(); in findSameInstrInMS() local
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h421 bool regsOverlap(Register RegA, Register RegB) const { in regsOverlap()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2216 for (auto &RegA : DefsA) in isDependent() local
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp531 Register RegA = Prev->getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp5831 Register RegA = Root.getOperand(1).getReg(); in genSubAdd2SubSub() local