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Searched defs:RegA (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86WinAllocaExpander.cpp220 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
234 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
248 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower() local
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCRegisterInfo.h560 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
568 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
574 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
580 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
656 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp416 static bool regsAreCompatible(Register RegA, Register RegB, in regsAreCompatible()
437 bool TwoAddressInstructionPass::isProfitableToCommute(Register RegA, in isProfitableToCommute()
559 Register RegA = MI->getOperand(DstIdx).getReg(); in commuteInstruction() local
568 bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA, in isProfitableToConv3Addr()
587 Register RegA, Register RegB, unsigned Dist) { in convertInstTo3Addr()
1375 Register RegA = DstMO.getReg(); in processTiedPairs() local
H A DImplicitNullChecks.cpp288 Register RegA = MOA.getReg(); in canReorder() local
H A DTargetInstrInfo.cpp844 Register RegA = OpA.getReg(); in reassociateOps() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2130 for (auto &RegA : DefsA) in isDependent() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp527 Register RegA = Prev->getOperand(AddOpIdx).getReg(); in getFMAPatterns() local