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Searched defs:Reg1 (Results 1 – 25 of 42) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR()
214 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX()
226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR()
232 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRRX()
245 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI()
252 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp200 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitStore()
223 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitLoad()
H A DAArch64FrameLowering.cpp992 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
1005 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
1043 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1054 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
2448 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
2479 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
2498 unsigned Reg1 = AArch64::NoRegister; member
2748 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
2854 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
406 Register Reg1 = MI1->getOperand(0).getReg(); in ConsecutiveInstr() local
478 Register Reg1 = MI1->getOperand(1).getReg(); in ReduceXWtoXWP() local
H A DMipsAsmPrinter.cpp951 unsigned Opcode, unsigned Reg1, in EmitInstrRegReg()
971 unsigned Opcode, unsigned Reg1, in EmitInstrRegRegReg()
982 unsigned MovOpc, unsigned Reg1, in EmitMovFPIntPair()
H A DMipsSEFrameLowering.cpp464 unsigned Reg1 = in emitPrologue() local
481 unsigned Reg1 = MRI->getDwarfRegNum(Reg, true) + 1; in emitPrologue() local
H A DMips16InstrInfo.cpp278 unsigned Reg1, unsigned Reg2) const { in adjustStackPtrBig()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86ExpandPseudo.cpp467 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in ExpandMI() local
501 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in ExpandMI() local
H A DX86InstrBuilder.h165 unsigned Reg1, bool isKill1, in addRegReg()
H A DX86FixupGadgets.cpp541 unsigned Reg1, unsigned Reg2) const { in hasImplicitUseOrDef()
H A DX86AvoidStoreForwardingBlocks.cpp391 Register Reg1 = MRI->createVirtualRegister( in buildCopy() local
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp299 Register Reg1 = Op1.getReg(); in legalizeCustom() local
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp231 Register Reg1 = cast<RegisterSDNode>(V1)->getReg(); in tryInlineAsm() local
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCRegisterInfo.h78 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains()
756 uint16_t Reg1 = 0; variable
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp278 unsigned Reg1 = in getRegisterSeqOpValue() local
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp980 Register Reg1 = Reg; in lowerCRSpilling() local
1025 Register Reg1 = Reg; in lowerCRRestore() local
1139 Register Reg1 = Reg; in lowerCRBitSpilling() local
H A DPPCVSXSwapRemoval.cpp898 Register Reg1 = MI->getOperand(1).getReg(); in handleSpecialSwappables() local
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp194 unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg(); in selectInlineAsm() local
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp1437 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwo() local
1450 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpaced() local
1505 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwoAllLanes() local
1552 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpacedAllLanes() local
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp1003 bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, in parseAddress()
1115 Register Reg1, Reg2; in parseAddress() local
1523 Register Reg1, Reg2; in parseOperand() local
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp446 const DebugLoc &DL, unsigned Reg1, unsigned Reg2) { in createRegSequence()
H A DThumb2SizeReduction.cpp755 Register Reg1 = MI->getOperand(1).getReg(); in ReduceTo2Addr() local
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp633 unsigned Reg1 = *MRI.getLLVMRegNum(Inst.getRegister(), true); in generateCompactUnwindEncoding() local
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp89 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) { in UnionGroups()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1756 StringRef Reg1(R1); in processInstruction() local
1900 StringRef Reg1(R1); in processInstruction() local

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