| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64TargetStreamer.h | 50 virtual void emitARM64WinCFISaveReg(unsigned Reg, int Offset) {} in emitARM64WinCFISaveReg()
51 virtual void emitARM64WinCFISaveRegX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegX()
52 virtual void emitARM64WinCFISaveRegP(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegP()
53 virtual void emitARM64WinCFISaveRegPX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegPX()
54 virtual void emitARM64WinCFISaveLRPair(unsigned Reg, int Offset) {} in emitARM64WinCFISaveLRPair()
55 virtual void emitARM64WinCFISaveFReg(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFReg()
56 virtual void emitARM64WinCFISaveFRegX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegX()
57 virtual void emitARM64WinCFISaveFRegP(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegP()
58 virtual void emitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegPX()
71 virtual void emitARM64WinCFISaveAnyRegI(unsigned Reg, int Offset) {} in emitARM64WinCFISaveAnyRegI()
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| H A D | AArch64WinCOFFStreamer.cpp | 70 int Reg, int Offset) { in emitARM64WinUnwindCode()
103 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveReg(unsigned Reg, in emitARM64WinCFISaveReg()
110 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegX(unsigned Reg, in emitARM64WinCFISaveRegX()
115 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegP(unsigned Reg, in emitARM64WinCFISaveRegP()
120 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegPX(unsigned Reg, in emitARM64WinCFISaveRegPX()
125 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveLRPair(unsigned Reg, in emitARM64WinCFISaveLRPair()
130 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFReg(unsigned Reg, in emitARM64WinCFISaveFReg()
137 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegX(unsigned Reg, in emitARM64WinCFISaveFRegX()
142 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegP(unsigned Reg, in emitARM64WinCFISaveFRegP()
147 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegPX(unsigned Reg, in emitARM64WinCFISaveFRegPX()
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| H A D | AArch64ELFStreamer.cpp | 68 void emitARM64WinCFISaveReg(unsigned Reg, int Offset) override { in emitARM64WinCFISaveReg()
71 void emitARM64WinCFISaveRegX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegX()
74 void emitARM64WinCFISaveRegP(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegP()
77 void emitARM64WinCFISaveRegPX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegPX()
80 void emitARM64WinCFISaveLRPair(unsigned Reg, int Offset) override { in emitARM64WinCFISaveLRPair()
83 void emitARM64WinCFISaveFReg(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFReg()
86 void emitARM64WinCFISaveFRegX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegX()
89 void emitARM64WinCFISaveFRegP(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegP()
92 void emitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegPX()
114 void emitARM64WinCFISaveAnyRegI(unsigned Reg, int Offset) override { in emitARM64WinCFISaveAnyRegI()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 20 unsigned Reg; variable
23 constexpr Register(unsigned Val = 0): Reg(Val) {} in Reg() function
44 static bool isStackSlot(unsigned Reg) { in isStackSlot()
52 static int stackSlot2Index(Register Reg) { in stackSlot2Index()
65 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
71 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister()
77 static unsigned virtReg2Index(Register Reg) { in virtReg2Index()
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| H A D | MachineRegisterInfo.h | 176 void noteNewVirtualRegister(Register Reg) { in noteNewVirtualRegister()
308 inline iterator_range<reg_iterator> reg_operands(Register Reg) const { in reg_operands()
324 reg_instructions(Register Reg) const { in reg_instructions()
339 inline iterator_range<reg_bundle_iterator> reg_bundles(Register Reg) const { in reg_bundles()
359 reg_nodbg_operands(Register Reg) const { in reg_nodbg_operands()
376 reg_nodbg_instructions(Register Reg) const { in reg_nodbg_instructions()
393 reg_nodbg_bundles(Register Reg) const { in reg_nodbg_bundles()
411 inline iterator_range<def_iterator> def_operands(Register Reg) const { in def_operands()
427 def_instructions(Register Reg) const { in def_instructions()
442 inline iterator_range<def_bundle_iterator> def_bundles(Register Reg) const { in def_bundles()
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| H A D | LiveRegUnits.h | 56 Register Reg = O->getReg(); in accumulateUsedDefed() local
86 void addReg(MCPhysReg Reg) { in addReg()
93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked()
102 void removeReg(MCPhysReg Reg) { in removeReg()
116 bool available(MCPhysReg Reg) const { in available()
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| H A D | LiveVariables.h | 217 bool removeVirtualRegisterKilled(Register Reg, MachineInstr &MI) { in removeVirtualRegisterKilled()
252 bool removeVirtualRegisterDead(Register Reg, MachineInstr &MI) { in removeVirtualRegisterDead()
288 bool isLiveIn(Register Reg, const MachineBasicBlock &MBB) { in isLiveIn()
311 bool isPHIJoin(Register Reg) { return PHIJoins.test(Reg.id()); } in isPHIJoin()
314 void setPHIJoin(Register Reg) { PHIJoins.set(Reg.id()); } in setPHIJoin()
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| H A D | LiveIntervals.h | 112 LiveInterval &getInterval(Register Reg) { in getInterval()
119 const LiveInterval &getInterval(Register Reg) const { in getInterval()
123 bool hasInterval(Register Reg) const { in hasInterval()
129 LiveInterval &createEmptyInterval(Register Reg) { in createEmptyInterval()
136 LiveInterval &createAndComputeVirtRegInterval(Register Reg) { in createAndComputeVirtRegInterval()
143 void removeInterval(Register Reg) { in removeInterval()
419 void removeAllRegUnitsForPhysReg(MCRegister Reg) { in removeAllRegUnitsForPhysReg()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 70 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
83 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
104 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup()
114 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive()
158 unsigned Reg = *AI; in StartBlock() local
172 unsigned Reg = *I; in StartBlock() local
203 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
228 Register Reg = MO.getReg(); in IsImplicitDefUse() local
248 const Register Reg = MO.getReg(); in GetPassthruRegs() local
292 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| H A D | LiveVariables.cpp | 84 LiveVariables::VarInfo &LiveVariables::getVarInfo(Register Reg) { in getVarInfo()
127 void LiveVariables::HandleVirtRegUse(Register Reg, MachineBasicBlock *MBB, in HandleVirtRegUse()
178 void LiveVariables::HandleVirtRegDef(Register Reg, MachineInstr &MI) { in HandleVirtRegDef()
189 LiveVariables::FindLastPartialDef(Register Reg, in FindLastPartialDef()
228 void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) { in HandlePhysRegUse()
278 MachineInstr *LiveVariables::FindLastRefOrPartRef(Register Reg) { in FindLastRefOrPartRef()
308 bool LiveVariables::HandlePhysRegKill(Register Reg, MachineInstr *MI) { in HandlePhysRegKill()
423 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
440 void LiveVariables::HandlePhysRegDef(Register Reg, MachineInstr *MI, in HandlePhysRegDef()
486 Register Reg = Defs.pop_back_val(); in UpdatePhysRegDefs() local
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| H A D | MachineRegisterInfo.cpp | 57 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass()
62 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
68 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
84 Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs) { in constrainRegClass()
91 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
121 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
146 Register Reg = Register::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local
164 Register Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
172 Register Reg = createIncompleteVirtualRegister(Name); in cloneVirtualRegister() local
187 Register Reg = createIncompleteVirtualRegister(Name); in createGenericVirtualRegister() local
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| H A D | CriticalAntiDepBreaker.cpp | 70 unsigned Reg = *AI; in StartBlock() local
84 unsigned Reg = *I; in StartBlock() local
88 unsigned Reg = *AI; in StartBlock() local
114 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
184 Register Reg = MO.getReg(); in PrescanInstruction() local
226 Register Reg = MO.getReg(); in PrescanInstruction() local
286 Register Reg = MO.getReg(); in ScanInstruction() local
317 Register Reg = MO.getReg(); in ScanInstruction() local
473 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
621 Register Reg = MO.getReg(); in BreakAntiDependencies() local
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| H A D | RegisterScavenging.cpp | 51 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) { in setRegUsed()
98 void RegScavenger::addRegUnits(BitVector &BV, MCRegister Reg) { in addRegUnits()
103 void RegScavenger::removeRegUnits(BitVector &BV, MCRegister Reg) { in removeRegUnits()
137 MCRegister Reg = MO.getReg().asMCReg(); in determineKillsAndDefs() local
186 Register Reg = MO.getReg(); in forward() local
260 bool RegScavenger::isRegUsed(Register Reg, bool includeReserved) const { in isRegUsed()
381 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local
406 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local
452 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in spill()
605 MCPhysReg Reg = P.first; in scavengeRegisterBackwards() local
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| H A D | FixupStatepointCallerSaved.cpp | 92 static unsigned getRegisterSize(const TargetRegisterInfo &TRI, Register Reg) { in getRegisterSize()
110 static Register performCopyPropagation(Register Reg, in performCopyPropagation()
183 void recordReload(Register Reg, int FI, const MachineBasicBlock *MBB) { in recordReload()
191 bool hasReload(Register Reg, int FI, const MachineBasicBlock *MBB) { in hasReload()
251 int getFrameIndex(Register Reg, MachineBasicBlock *EHPad) { in getFrameIndex()
367 bool isCalleeSaved(Register Reg) { return (Mask[Reg / 32] >> Reg % 32) & 1; } in isCalleeSaved()
388 Register Reg = MO.getReg(); in findRegistersToSpill() local
408 for (Register Reg : RegsToSpill) { in spillRegisters() local
429 void insertReloadBefore(unsigned Reg, MachineBasicBlock::iterator It, in insertReloadBefore()
457 for (auto Reg : RegsToReload) { in insertReloads() local
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| H A D | LiveIntervals.cpp | 158 Register Reg = Register::index2VirtReg(i); in print() local
198 Register Reg = Register::index2VirtReg(i); in computeVirtRegs() local
285 MCRegister Reg = *Super; in computeRegUnitRange() local
304 MCRegister Reg = *Super; in computeRegUnitRange() local
370 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses()
468 Register Reg = li->reg(); in shrinkToUses() local
551 void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, Register Reg) { in shrinkToUses()
696 Register Reg = Register::index2VirtReg(i); in addKillFlags() local
870 LiveIntervals::addSegmentToEndOfBlock(Register Reg, MachineInstr &startInst) { in addSegmentToEndOfBlock()
888 static bool hasLiveThroughUse(const MachineInstr *MI, Register Reg) { in hasLiveThroughUse()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 46 static inline bool isARMArea1Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea1Register()
62 static inline bool isARMArea2Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea2Register()
74 static inline bool isSplitFPArea1Register(unsigned Reg, in isSplitFPArea1Register()
89 static inline bool isSplitFPArea2Register(unsigned Reg, in isSplitFPArea2Register()
101 static inline bool isARMArea3Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea3Register()
119 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| H A D | Thumb1FrameLowering.cpp | 211 Register Reg = I.getReg(); in emitPrologue() local
361 Register Reg = I.getReg(); in emitPrologue() local
395 Register Reg = I.getReg(); in emitPrologue() local
424 Register Reg = I.getReg(); in emitPrologue() local
566 Register Reg = I.getReg(); in emitEpilogue() local
618 for (auto Reg : GPRsNoLRSP.set_bits()) { in findTemporariesForLR() local
849 for (Register Reg : Regs) { in splitLowAndHighRegs() local
864 [&](Register Reg) { return RegSet.count(Reg); }); in getNextOrderedReg()
883 for (unsigned Reg : OrderedLowRegs) { in pushRegsToStack() local
949 for (unsigned Reg : llvm::reverse(RegsToPush)) in pushRegsToStack() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 73 static bool isVecReg(unsigned Reg) { in isVecReg()
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
144 unsigned Reg = 0; in runOnMachineFunction() local
152 unsigned Reg = 0; in runOnMachineFunction() local
168 unsigned Reg = 0; in runOnMachineFunction() local
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCRegister.h | 26 unsigned Reg; variable
29 constexpr MCRegister(unsigned Val = 0): Reg(Val) {} in Reg() function
52 static bool isStackSlot(unsigned Reg) { in isStackSlot()
58 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
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| H A D | MCRegisterInfo.h | 68 bool contains(MCRegister Reg) const { in contains()
252 mc_difflist_iterator(MCRegister Reg, const MCPhysReg *DiffList) { in mc_difflist_iterator()
290 mc_subreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI) in mc_subreg_iterator()
302 mc_superreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI) in mc_superreg_iterator()
309 iterator_range<mc_subreg_iterator> subregs(MCRegister Reg) const { in subregs()
316 iterator_range<mc_subreg_iterator> subregs_inclusive(MCRegister Reg) const { in subregs_inclusive()
322 iterator_range<mc_superreg_iterator> superregs(MCRegister Reg) const { in superregs()
330 superregs_inclusive(MCRegister Reg) const { in superregs_inclusive()
338 sub_and_superregs_inclusive(MCRegister Reg) const { in sub_and_superregs_inclusive()
617 MCSubRegIndexIterator(MCRegister Reg, const MCRegisterInfo *MCRI) in MCSubRegIndexIterator()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 60 unsigned Reg; member
81 void setReg(unsigned Reg) { in setReg()
290 Register Reg = getRegForValue(Op); in computeAddress() local
376 Register Reg = getRegForValue(Obj); in computeAddress() local
385 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local
418 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value()
434 Register Reg = getRegForValue(V); in getRegForI1Value() local
440 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32()
476 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32()
512 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 71 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass() local
82 MCRegister Reg = RISCV::F0_H + RegNo; in DecodeFPR16RegisterClass() local
93 MCRegister Reg = RISCV::F0_F + RegNo; in DecodeFPR32RegisterClass() local
104 MCRegister Reg = RISCV::F8_F + RegNo; in DecodeFPR32CRegisterClass() local
115 MCRegister Reg = RISCV::F0_D + RegNo; in DecodeFPR64RegisterClass() local
126 MCRegister Reg = RISCV::F8_D + RegNo; in DecodeFPR64CRegisterClass() local
157 MCRegister Reg = RISCV::X8 + RegNo; in DecodeGPRCRegisterClass() local
168 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRPF64RegisterClass() local
179 MCRegister Reg = RISCV::V0 + RegNo; in DecodeVRRegisterClass() local
196 MCRegister Reg = in DecodeVRM2RegisterClass() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.h | 60 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64()
65 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32()
70 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32()
75 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 1349 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local
1359 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local
1369 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local
1379 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local
1389 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local
1415 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local
1426 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local
1436 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local
1446 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local
1457 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeVGPRLiveRange.cpp | 212 Register Reg, MachineBasicBlock *MBB, in findNonPHIUsesInBlock()
279 Register Reg = MO.getReg(); in collectCandidateRegisters() local
300 auto IsLiveThroughThen = [&](Register Reg) { in collectCandidateRegisters()
322 for (auto Reg : KillsInElse) { in collectCandidateRegisters() local
401 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow) const { in updateLiveRangeInThenRegion()
470 Register Reg, Register NewReg, MachineBasicBlock *Flow, in updateLiveRangeInElseRegion()
500 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow, in optimizeLiveRange()
544 Register Reg, MachineBasicBlock *LoopHeader, in optimizeWaterfallLiveRange()
670 for (auto Reg : CandidateRegs) in runOnMachineFunction() local
687 for (auto Reg : CandidateRegs) in runOnMachineFunction() local
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