/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | Register.h | 20 unsigned Reg; variable 23 constexpr Register(unsigned Val = 0): Reg(Val) {} in Reg() function 44 static bool isStackSlot(unsigned Reg) { in isStackSlot() 52 static int stackSlot2Index(Register Reg) { in stackSlot2Index() 65 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister() 71 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister() 77 static unsigned virtReg2Index(Register Reg) { in virtReg2Index()
|
H A D | MachineRegisterInfo.h | 286 inline iterator_range<reg_iterator> reg_operands(Register Reg) const { in reg_operands() 302 reg_instructions(Register Reg) const { in reg_instructions() 317 inline iterator_range<reg_bundle_iterator> reg_bundles(Register Reg) const { in reg_bundles() 337 reg_nodbg_operands(Register Reg) const { in reg_nodbg_operands() 354 reg_nodbg_instructions(Register Reg) const { in reg_nodbg_instructions() 371 reg_nodbg_bundles(Register Reg) const { in reg_nodbg_bundles() 389 inline iterator_range<def_iterator> def_operands(Register Reg) const { in def_operands() 405 def_instructions(Register Reg) const { in def_instructions() 420 inline iterator_range<def_bundle_iterator> def_bundles(Register Reg) const { in def_bundles() 428 StringRef getVRegName(Register Reg) const { in getVRegName() [all …]
|
H A D | LiveRegUnits.h | 56 Register Reg = O->getReg(); in accumulateUsedDefed() local 86 void addReg(MCPhysReg Reg) { in addReg() 93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked() 102 void removeReg(MCPhysReg Reg) { in removeReg() 116 bool available(MCPhysReg Reg) const { in available()
|
H A D | LiveVariables.h | 210 bool removeVirtualRegisterKilled(Register Reg, MachineInstr &MI) { in removeVirtualRegisterKilled() 246 bool removeVirtualRegisterDead(Register Reg, MachineInstr &MI) { in removeVirtualRegisterDead() 283 bool isLiveIn(Register Reg, const MachineBasicBlock &MBB) { in isLiveIn() 306 bool isPHIJoin(Register Reg) { return PHIJoins.test(Reg.id()); } in isPHIJoin() 309 void setPHIJoin(Register Reg) { PHIJoins.set(Reg.id()); } in setPHIJoin()
|
H A D | LiveIntervals.h | 114 LiveInterval &getInterval(Register Reg) { in getInterval() 121 const LiveInterval &getInterval(Register Reg) const { in getInterval() 125 bool hasInterval(Register Reg) const { in hasInterval() 131 LiveInterval &createEmptyInterval(Register Reg) { in createEmptyInterval() 138 LiveInterval &createAndComputeVirtRegInterval(Register Reg) { in createAndComputeVirtRegInterval() 145 void removeInterval(Register Reg) { in removeInterval() 425 void removeAllRegUnitsForPhysReg(MCRegister Reg) { in removeAllRegUnitsForPhysReg()
|
H A D | LivePhysRegs.h | 79 void addReg(MCPhysReg Reg) { in addReg() 89 void removeReg(MCPhysReg Reg) { in removeReg() 106 bool contains(MCPhysReg Reg) const { return LiveRegs.count(Reg); } in contains()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64TargetStreamer.h | 49 virtual void EmitARM64WinCFISaveReg(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveReg() 50 virtual void EmitARM64WinCFISaveRegX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegX() 51 virtual void EmitARM64WinCFISaveRegP(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegP() 52 virtual void EmitARM64WinCFISaveRegPX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveRegPX() 53 virtual void EmitARM64WinCFISaveLRPair(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveLRPair() 54 virtual void EmitARM64WinCFISaveFReg(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFReg() 55 virtual void EmitARM64WinCFISaveFRegX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegX() 56 virtual void EmitARM64WinCFISaveFRegP(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegP() 57 virtual void EmitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) {} in EmitARM64WinCFISaveFRegPX()
|
H A D | AArch64WinCOFFStreamer.cpp | 69 int Reg, in EmitARM64WinUnwindCode() 104 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveReg(unsigned Reg, in EmitARM64WinCFISaveReg() 111 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegX(unsigned Reg, in EmitARM64WinCFISaveRegX() 116 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegP(unsigned Reg, in EmitARM64WinCFISaveRegP() 121 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveRegPX(unsigned Reg, in EmitARM64WinCFISaveRegPX() 126 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveLRPair(unsigned Reg, in EmitARM64WinCFISaveLRPair() 131 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFReg(unsigned Reg, in EmitARM64WinCFISaveFReg() 138 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegX(unsigned Reg, in EmitARM64WinCFISaveFRegX() 143 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegP(unsigned Reg, in EmitARM64WinCFISaveFRegP() 148 void AArch64TargetWinCOFFStreamer::EmitARM64WinCFISaveFRegPX(unsigned Reg, in EmitARM64WinCFISaveFRegPX()
|
H A D | AArch64ELFStreamer.cpp | 68 void EmitARM64WinCFISaveReg(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveReg() 71 void EmitARM64WinCFISaveRegX(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveRegX() 74 void EmitARM64WinCFISaveRegP(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveRegP() 77 void EmitARM64WinCFISaveRegPX(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveRegPX() 80 void EmitARM64WinCFISaveLRPair(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveLRPair() 83 void EmitARM64WinCFISaveFReg(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveFReg() 86 void EmitARM64WinCFISaveFRegX(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveFRegX() 89 void EmitARM64WinCFISaveFRegP(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveFRegP() 92 void EmitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) override { in EmitARM64WinCFISaveFRegPX()
|
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
H A D | MCRegister.h | 24 unsigned Reg; variable 27 constexpr MCRegister(unsigned Val = 0): Reg(Val) {} in Reg() function 50 static bool isStackSlot(unsigned Reg) { in isStackSlot() 56 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
|
H A D | MCRegisterInfo.h | 68 bool contains(MCRegister Reg) const { in contains() 252 mc_difflist_iterator(MCRegister Reg, const MCPhysReg *DiffList) { in mc_difflist_iterator() 290 mc_subreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI) in mc_subreg_iterator() 302 mc_superreg_iterator(MCRegister Reg, const MCRegisterInfo *MCRI) in mc_superreg_iterator() 309 iterator_range<mc_subreg_iterator> subregs(MCRegister Reg) const { in subregs() 316 iterator_range<mc_subreg_iterator> subregs_inclusive(MCRegister Reg) const { in subregs_inclusive() 322 iterator_range<mc_superreg_iterator> superregs(MCRegister Reg) const { in superregs() 330 superregs_inclusive(MCRegister Reg) const { in superregs_inclusive() 338 sub_and_superregs_inclusive(MCRegister Reg) const { in sub_and_superregs_inclusive() 614 MCSubRegIndexIterator(MCRegister Reg, const MCRegisterInfo *MCRI) in MCSubRegIndexIterator() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonVectorPrint.cpp | 73 static bool isVecReg(unsigned Reg) { in isVecReg() 96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr() 108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg() 144 unsigned Reg = 0; in runOnMachineFunction() local 152 unsigned Reg = 0; in runOnMachineFunction() local 168 unsigned Reg = 0; in runOnMachineFunction() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | AggressiveAntiDepBreaker.cpp | 70 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup() 83 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local 104 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup() 114 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive() 159 unsigned Reg = *AI; in StartBlock() local 173 unsigned Reg = *I; in StartBlock() local 204 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local 229 Register Reg = MO.getReg(); in IsImplicitDefUse() local 249 const Register Reg = MO.getReg(); in GetPassthruRegs() local 293 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse() [all …]
|
H A D | MachineRegisterInfo.cpp | 58 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass() 63 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank() 69 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass() 85 MachineRegisterInfo::constrainRegClass(Register Reg, in constrainRegClass() 92 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs() 122 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass() 147 Register Reg = Register::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local 165 Register Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local 174 Register Reg = createIncompleteVirtualRegister(Name); in cloneVirtualRegister() local 190 Register Reg = createIncompleteVirtualRegister(Name); in createGenericVirtualRegister() local [all …]
|
H A D | LiveVariables.cpp | 84 LiveVariables::VarInfo &LiveVariables::getVarInfo(Register Reg) { in getVarInfo() 128 void LiveVariables::HandleVirtRegUse(Register Reg, MachineBasicBlock *MBB, in HandleVirtRegUse() 179 void LiveVariables::HandleVirtRegDef(Register Reg, MachineInstr &MI) { in HandleVirtRegDef() 190 LiveVariables::FindLastPartialDef(Register Reg, in FindLastPartialDef() 229 void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) { in HandlePhysRegUse() 279 MachineInstr *LiveVariables::FindLastRefOrPartRef(Register Reg) { in FindLastRefOrPartRef() 309 bool LiveVariables::HandlePhysRegKill(Register Reg, MachineInstr *MI) { in HandlePhysRegKill() 424 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local 441 void LiveVariables::HandlePhysRegDef(Register Reg, MachineInstr *MI, in HandlePhysRegDef() 487 Register Reg = Defs.back(); in UpdatePhysRegDefs() local [all …]
|
H A D | MachineCopyPropagation.cpp | 102 for (MCRegister Reg : Regs) { in markRegsUnavailable() local 113 void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI) { in invalidateRegister() 136 void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI) { in clobberRegister() 200 MachineInstr *findAvailBackwardCopy(MachineInstr &I, MCRegister Reg, in findAvailBackwardCopy() 221 MachineInstr *findAvailCopy(MachineInstr &DestCopy, MCRegister Reg, in findAvailCopy() 313 void MachineCopyPropagation::ReadRegister(MCRegister Reg, MachineInstr &Reader, in ReadRegister() 617 MCRegister Reg = MO.getReg().asMCReg(); in ForwardCopyPropagateBlock() local 640 MCRegister Reg = MO.getReg().asMCReg(); in ForwardCopyPropagateBlock() local 654 MCRegister Reg = MO.getReg().asMCReg(); in ForwardCopyPropagateBlock() local 673 Register Reg = MO.getReg(); in ForwardCopyPropagateBlock() local [all …]
|
H A D | MIRVRegNamerUtils.h | 36 Register Reg; variable 40 NamedVReg(Register Reg, std::string Name = "") : Reg(Reg), Name(Name) {} in Reg() argument
|
H A D | CriticalAntiDepBreaker.cpp | 71 unsigned Reg = *AI; in StartBlock() local 85 unsigned Reg = *I; in StartBlock() local 89 unsigned Reg = *AI; in StartBlock() local 115 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local 185 Register Reg = MO.getReg(); in PrescanInstruction() local 280 Register Reg = MO.getReg(); in ScanInstruction() local 311 Register Reg = MO.getReg(); in ScanInstruction() local 471 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local 620 Register Reg = MO.getReg(); in BreakAntiDependencies() local
|
H A D | RegisterScavenging.cpp | 53 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) { in setRegUsed() 100 void RegScavenger::addRegUnits(BitVector &BV, MCRegister Reg) { in addRegUnits() 105 void RegScavenger::removeRegUnits(BitVector &BV, MCRegister Reg) { in removeRegUnits() 139 MCRegister Reg = MO.getReg().asMCReg(); in determineKillsAndDefs() local 188 Register Reg = MO.getReg(); in forward() local 262 bool RegScavenger::isRegUsed(Register Reg, bool includeReserved) const { in isRegUsed() 383 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local 401 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards() local 447 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj, in spill() 579 MCPhysReg Reg = P.first; in scavengeRegisterBackwards() local [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 46 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { in isARMArea1Register() 62 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { in isARMArea2Register() 74 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { in isARMArea3Register() 92 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.h | 64 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64() 69 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32() 74 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32() 79 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 59 unsigned Reg; member 80 void setReg(unsigned Reg) { in setReg() 286 unsigned Reg = getRegForValue(Op); in computeAddress() local 372 unsigned Reg = getRegForValue(Obj); in computeAddress() local 381 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local 414 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value() 433 unsigned Reg = getRegForValue(V); in getRegForI1Value() local 439 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32() 475 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32() 511 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/Disassembler/ |
H A D | RISCVDisassembler.cpp | 73 MCRegister Reg = RISCV::X0 + RegNo; in DecodeGPRRegisterClass() local 84 MCRegister Reg = RISCV::F0_H + RegNo; in DecodeFPR16RegisterClass() local 95 MCRegister Reg = RISCV::F0_F + RegNo; in DecodeFPR32RegisterClass() local 106 MCRegister Reg = RISCV::F8_F + RegNo; in DecodeFPR32CRegisterClass() local 117 MCRegister Reg = RISCV::F0_D + RegNo; in DecodeFPR64RegisterClass() local 128 MCRegister Reg = RISCV::F8_D + RegNo; in DecodeFPR64CRegisterClass() local 159 MCRegister Reg = RISCV::X8 + RegNo; in DecodeGPRCRegisterClass() local 170 MCRegister Reg = RISCV::V0 + RegNo; in DecodeVRRegisterClass() local 187 MCRegister Reg = in DecodeVRM2RegisterClass() local 207 MCRegister Reg = in DecodeVRM4RegisterClass() local [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 137 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { in getRegTy() 168 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; in eraseGPOpnd() local 233 unsigned Reg; in visitNode() local 265 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg, in isCallViaRegister() 307 unsigned Reg = ScopedHT.lookup(Entry).second; in getReg() local 312 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) { in incCntAndSetReg()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 1409 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local 1420 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local 1431 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local 1442 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local 1453 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local 1482 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local 1494 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local 1505 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local 1516 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local 1527 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local [all …]
|