| /llvm-project/compiler-rt/lib/tsan/tests/rtl/ |
| H A D | tsan_test_util.h | 42 RW, enumerator
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 94 uint16_t RW = getRegBitWidth(RegisterRef(Reg, Sub)); mask() local
281 __anon356067470402(const BT::RegisterCell &RC, uint16_t RW) evaluate() argument
282 __anon356067470502(const BT::RegisterCell &RC, uint16_t RW) evaluate() argument
345 uint16_t RW = W0; evaluate() local
354 uint16_t RW = W0; evaluate() local
969 uint16_t RW = getRegBitWidth(PD); evaluate() local
[all...] |
| H A D | HexagonBitSimplify.cpp | 1587 unsigned RW = RC.width(); in findMatch() local
2432 unsigned RW = W; in simplifyExtractLow() local
[all...] |
| /llvm-project/clang/test/Layout/ |
| H A D | ms-x86-alias-avoidance-padding.cpp | 256 struct RW { char c; }; argument
|
| /llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.h | 147 RW : 1, // Current register width – 0 is AArch64, 1 is AArch32 member
|
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MLRegAllocEvictAdvisor.cpp | 273 double RW = 0; global() member
853 double RW = 0.0; extractFeatures() local
|
| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenSchedule.cpp | 702 CodeGenSchedRW &RW = getSchedRW(MatchDef); collectSchedRW() local
745 __anon0b422d480702(const CodeGenSchedRW &RW) getSchedRWIdx() argument
842 __anon0b422d480802(CodeGenSchedRW &RW) findRWForSequence() argument
[all...] |
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 1131 buildPrefetch(const SrcOp & Addr,unsigned RW,unsigned Locality,unsigned CacheType,MachineMemOperand & MMO) buildPrefetch() argument
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| H A D | IRTranslator.cpp | 2564 unsigned RW = cast<ConstantInt>(CI.getOperand(1))->getZExtValue(); translateKnownIntrinsic() local
|
| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 3480 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); EmitBuiltinExpr() local
8536 Value *RW = EmitScalarExpr(E->getArg(1)); EmitARMBuiltinExpr() local
11502 Value *RW = llvm::ConstantInt::get(Int32Ty, 0); EmitAArch64BuiltinExpr() local
14333 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); EmitX86BuiltinExpr() local
|