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Searched defs:RSrc (Results 1 – 4 of 4) sorted by relevance

/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp5817 Register RSrc = MI.getOperand(2).getReg(); legalizeBufferStore() local
5891 buildBufferLoad(unsigned Opc,Register LoadDstReg,Register RSrc,Register VIndex,Register VOffset,Register SOffset,unsigned ImmOffset,unsigned Format,unsigned AuxiliaryData,MachineMemOperand * MMO,bool IsTyped,bool HasVIndex,MachineIRBuilder & B) buildBufferLoad() argument
5934 Register RSrc = MI.getOperand(2 + OpOffset).getReg(); legalizeBufferLoad() local
6171 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); legalizeBufferAtomic() local
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H A DAMDGPURegisterBankInfo.cpp1385 Register RSrc = MI.getOperand(1).getReg(); applyMappingSBufferLoad() local
H A DAMDGPUInstructionSelector.cpp5021 Register RSrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass); buildRSRC() local
H A DSIInstrInfo.cpp434 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth() local