/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1234 Register RHSReg = getRegForValue(RHS); emitAddSub() local 1253 Register RHSReg = getRegForValue(MulLHS); emitAddSub() local 1276 Register RHSReg = getRegForValue(SI->getOperand(0)); emitAddSub() local 1288 Register RHSReg = getRegForValue(RHS); emitAddSub() local 1299 emitAddSub_rr(bool UseAdd,MVT RetVT,unsigned LHSReg,unsigned RHSReg,bool SetFlags,bool WantResult) emitAddSub_rr() argument 1381 emitAddSub_rs(bool UseAdd,MVT RetVT,unsigned LHSReg,unsigned RHSReg,AArch64_AM::ShiftExtendType ShiftType,uint64_t ShiftImm,bool SetFlags,bool WantResult) emitAddSub_rs() argument 1423 emitAddSub_rx(bool UseAdd,MVT RetVT,unsigned LHSReg,unsigned RHSReg,AArch64_AM::ShiftExtendType ExtType,uint64_t ShiftImm,bool SetFlags,bool WantResult) emitAddSub_rx() argument 1521 Register RHSReg = getRegForValue(RHS); emitFCmp() local 1568 emitSubs_rr(MVT RetVT,unsigned LHSReg,unsigned RHSReg,bool WantResult) emitSubs_rr() argument 1574 emitSubs_rs(MVT RetVT,unsigned LHSReg,unsigned RHSReg,AArch64_AM::ShiftExtendType ShiftType,uint64_t ShiftImm,bool WantResult) emitSubs_rs() argument 1623 Register RHSReg = getRegForValue(MulLHS); emitLogicalOp() local 1637 Register RHSReg = getRegForValue(SI->getOperand(0)); emitLogicalOp() local 1646 Register RHSReg = getRegForValue(RHS); emitLogicalOp() local 1705 emitLogicalOp_rs(unsigned ISDOpc,MVT RetVT,unsigned LHSReg,unsigned RHSReg,uint64_t ShiftImm) emitLogicalOp_rs() argument 3704 Register RHSReg = getRegForValue(RHS); fastLowerIntrinsicCall() local 3734 Register RHSReg = getRegForValue(RHS); fastLowerIntrinsicCall() local 3818 Register RHSReg = getRegForValue(II->getArgOperand(1)); fastLowerIntrinsicCall() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 502 validOpRegPair(MachineRegisterInfo & MRI,unsigned LHSReg,unsigned RHSReg,unsigned ExpectedSize,unsigned ExpectedRegBankID) const validOpRegPair() argument 544 auto RHSReg = MIB.getReg(3); selectCmp() local 576 insertComparison(CmpConstants Helper,InsertInfo I,unsigned ResReg,ARMCC::CondCodes Cond,unsigned LHSReg,unsigned RHSReg,unsigned PrevRes) const insertComparison() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2131 Register RHSReg = getRegForValue(RHS); X86FastEmitCMoveSelect() local 2187 Register RHSReg = getRegForValue(RHS); X86FastEmitSSESelect() local 2332 Register RHSReg = getRegForValue(RHS); X86FastEmitPseudoSelect() local 2912 unsigned RHSReg; fastLowerIntrinsicCall() local 3073 Register RHSReg = getRegForValue(RHS); fastLowerIntrinsicCall() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelper.cpp | 2996 Register RHSReg = MI.getOperand(2).getReg(); matchHoistLogicOpWithSameOpcodeHands() local 4615 Register RHSReg = MI.getOffsetReg(); matchReassocConstantInnerLHS() local 4737 Register RHSReg = MI.getOperand(2).getReg(); matchReassocCommBinOp() local 5800 Register RHSReg = MI.getOperand(2).getReg(); matchCombineFSubFNegFMulToFMadOrFMA() local 5847 Register RHSReg = MI.getOperand(2).getReg(); matchCombineFSubFpExtFMulToFMadOrFMA() local 5900 Register RHSReg = MI.getOperand(2).getReg(); matchCombineFSubFpExtFNegFMulToFMadOrFMA() local 6265 Register RHSReg = MI.getOperand(2).getReg(); applyCommuteBinOpOperands() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 316 unsigned RHSReg; in emitLogicalOp() local
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