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Searched defs:RHS0 (Results 1 – 7 of 7) sorted by relevance

/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp1315 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); matchIsFiniteTest() local
1333 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); foldLogicOfFCmps() local
3188 Value *RHS0 = RHS->getOperand(0); foldAndOrOfICmpEqConstantAndICmp() local
3241 Value *LHS0 = LHS->getOperand(0), *RHS0 = RHS->getOperand(0); foldAndOrOfICmps() local
4055 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); foldXorOfICmps() local
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/llvm-project/llvm/lib/Transforms/Scalar/
H A DGuardWidening.cpp729 ConstantInt *RHS0, *RHS1; mergeChecks() local
/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp841 SDValue RHS0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_0, getAVRCmp() local
/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1867 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); simplifyAndOrOfFCmps() local
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp7119 Register RHS0 = Cmp2->getLHSReg(); tryFoldLogicOfFCmps() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp6183 SDValue RHS0 = RHS->getOperand(0); foldAndOrOfSETCC() local
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/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp48489 SDValue RHS0 = RHS.getOperand(0); combineVectorHADDSUB() local
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