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Searched defs:RCID (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h159 bool isSGPRClassID(unsigned RCID) const { in isSGPRClassID()
H A DSIInstrInfo.cpp4434 unsigned RCID, in adjustAllocatableRegClass()
4497 unsigned RCID = Desc.OpInfo[OpNo].RegClass; in getOpRegClass() local
4507 unsigned RCID = get(MI.getOpcode()).OpInfo[OpIdx].RegClass; in legalizeOpWithMove() local
7379 const auto RCID = MI.getDesc().OpInfo[Idx].RegClass; in isBufferSMRD() local
H A DAMDGPUISelDAGToDAG.cpp584 unsigned RCID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue(); in getOperandRegClass() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1532 unsigned RCID; in handleSpecialFP() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DMachineInstr.cpp905 unsigned RCID; in getRegClassConstraint() local
1748 unsigned RCID = 0; in print() local
H A DTargetInstrInfo.cpp1398 unsigned RCID = 0; in createMIROperandComment() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp1591 unsigned getRegBitWidth(unsigned RCID) { in getRegBitWidth()
1682 unsigned RCID = Desc.OpInfo[OpNo].RegClass; in getRegOperandSize() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp249 bool isRegOrImmWithInputMods(unsigned RCID, MVT type) const { in isRegOrImmWithInputMods()
374 bool isRegOrInlineNoMods(unsigned RCID, MVT type) const { in isRegOrInlineNoMods()
2453 int RCID = getRegClass(RegKind, RegWidth); in getRegularReg() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp679 int RCID = Desc.OpInfo[OpNo].RegClass; in printOperand() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp147 unsigned RCID = getRegClassIDForVecVT(ContainerVT); in RISCVTargetLowering() local