| /llvm-project/llvm/test/MC/Hexagon/ |
| H A D | operand-range.s | 6 R3 = mpyi(R4, #256) define
|
| H A D | two-extenders.s | 33 R3 = memh(gp+#0x1000) define
|
| /llvm-project/llvm/unittests/Remarks/ |
| H A D | RemarksAPITest.cpp | 40 remarks::Remark R3 = R.clone(); in TEST() local
|
| /llvm-project/clang-tools-extra/test/clang-tidy/checkers/bugprone/ |
| H A D | unused-return-value-custom.cpp | 87 auto R3 = ns::Type::staticFun(); in noWarning() local
|
| /llvm-project/clang/test/CodeGenObjC/ |
| H A D | non-runtime-protocol.m | 130 @protocol R3 <R1> protocol
|
| /llvm-project/llvm/unittests/ExecutionEngine/Orc/ |
| H A D | ExecutorAddressTest.cpp | 83 ExecutorAddrRange R0(A0, A1), R1(A1, A2), R2(A2, A3), R3(A0, A2), R4(A1, A3); TEST() local
|
| /llvm-project/compiler-rt/lib/orc/tests/unit/ |
| H A D | executor_address_test.cpp | 88 ExecutorAddrRange R0(A0, A1), R1(A1, A2), R2(A2, A3), R3(A0, A2), R4(A1, A3); in TEST() local
|
| /llvm-project/llvm/unittests/IR/ |
| H A D | BasicBlockDbgInfoTest.cpp | 1258 auto R3 = RetInst->getDbgRecordRange(); in TEST() local
1341 auto R3 = AddInst->getDbgRecordRange(); in TEST() local
|
| /llvm-project/clang/test/CodeGenCXX/ |
| H A D | vtable-layout.cpp | 217 struct R3 : R1, R2 { int r3; }; struct
|
| /llvm-project/clang-tools-extra/test/clang-tidy/checkers/modernize/ |
| H A D | loop-convert-extra.cpp | 877 auto F3 = [&Arr, I]() { int R3 = Arr[I]; }; in capturesIndex() local
937 int R3 = Arr[I]; in implicitCapture() local
|
| /llvm-project/clang-tools-extra/test/clang-tidy/checkers/readability/ |
| H A D | isolate-declaration.cpp | 140 Rectangle R1({0., 0.}, {1., -2.}), R2{{0., 1.}, {1., 0.}}, R3(P1, P2), R4{P1, P2}; in f5() local
|
| /llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 766 SUB_SUPER(R1,R2,R3,R4,R) getX86SubSuperRegister() argument
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 815 return rr0(RegisterCell::ref(PC0 ? R2 : R3), Outputs); in evaluate() local
|
| H A D | HexagonConstPropagation.cpp | 2976 RegisterSubReg R3(MI.getOperand(3)); rewriteHexConstUses() local
|
| /llvm-project/llvm/unittests/DebugInfo/CodeView/ |
| H A D | TypeIndexDiscoveryTest.cpp | 263 OneMethodRecord R3{T3, member
|
| /llvm-project/clang/unittests/Tooling/ |
| H A D | SourceCodeTest.cpp | 765 llvm::Annotations::Range R3 = Code.range("test3"); TEST() local
|
| /llvm-project/llvm/unittests/Transforms/Vectorize/ |
| H A D | VPlanTest.cpp | 605 VPRegionBlock *R3 = new VPRegionBlock(R3BB1, R3BB1, "R3"); TEST() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 7032 Register R3 = MRI.createGenericVirtualRegister(S32); legalizeBVHIntrinsic() local
|
| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6751 __anon87a70b730502(unsigned Opc, Register R1, Register R2, Register R3) lowerRotate() argument
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29676 SDValue R3 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt3)); LowerShift() local
[all...] |